A low complexity and fast SIFT feature extraction method based on FPGA

A feature extraction and low-complexity technology, applied in the field of computer vision, can solve the problems of high power consumption, low power consumption, and high speed, and achieve high matching rate, speed improvement, and high stability

Pending Publication Date: 2019-03-26
TIANJIN UNIV
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AI Technical Summary

Problems solved by technology

However, these two acceleration methods have the disadvantage of high power consumption and cannot be applied in embedded systems.
[0008] Because the Field Programmable Gate Array (FPGA) has the characteristics of high speed and low power consumption, many researchers use FPGA to

Method used

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  • A low complexity and fast SIFT feature extraction method based on FPGA
  • A low complexity and fast SIFT feature extraction method based on FPGA
  • A low complexity and fast SIFT feature extraction method based on FPGA

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Embodiment Construction

[0023] The proposed SIFT hardware architecture as figure 1 shown. The system mainly includes preprocessing, scale space construction (Gaussian pyramid construction and Gaussian difference pyramid construction), gradient information calculation, feature point detection, feature point main direction calculation and feature descriptor extraction.

[0024] In the preprocessing module, the gray pixels of the original image are transferred to the upsampling module through DMA (direct memory access). The output of the up-sampling module is sent to the initial two-dimensional Gaussian filter module G0 to generate a reference Gaussian image, and then four parallel two-dimensional Gaussian filters G1-G4 are used to generate a four-layer Gaussian image to form a Gaussian pyramid. Gaussian difference images D1 to D3 obtained by subtracting two adjacent layers of Gaussian images form a Gaussian difference pyramid. The detection of feature points is carried out in the difference of Gaussi...

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Abstract

The invention relates to the field of computer vision, in order to optimize the feature descriptor extraction part of the SIFT algorithm, improve the hardware execution speed of the part, maintain thestability of the feature descriptor, and reduce the consumption of FPGA hardware resources. To this end, The technical scheme adopted by the invention is as follows: A low-complexity and fast SIFT feature extraction method based on FPGA utilizes an upsampling module to collect image data to an initial two-dimensional Gaussian filter module G0 to generate a reference Gaussian image, and then utilizes four parallel two-dimensional Gaussian filters G1 to G4 to generate four-layer Gaussian images to form a Gaussian pyramid. Gaussian difference images D1 to D3 obtained by subtracting two adjacentGaussian images constitute a Gaussian difference pyramid. The invention is mainly applied to image feature extraction occasions.

Description

technical field [0001] The invention relates to the field of computer vision, relates to a real-time target recognition system based on FPGA (Field Programmable Gate Array), in particular to a fast SIFT feature extraction technology based on FPGA. Background technique [0002] In the field of computer vision, the scale invariant feature transform (SIFT) algorithm is widely used. The main idea of ​​the SIFT algorithm is to first detect stable feature points in the image, and then extract local feature descriptors in the neighborhood of feature points. The main steps are as follows. [0003] (1) Perform preprocessing on the input image including upsampling and initial Gaussian filtering, and then construct a Gaussian pyramid and a Gaussian difference pyramid. [0004] (2) Detect feature points in the Gaussian difference pyramid. [0005] (3) Calculate the main direction of the feature points. [0006] (4) Rotate the feature point neighborhood according to the main direction...

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Application Information

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IPC IPC(8): G06K9/46G06T1/20
CPCG06T1/20G06V10/462
Inventor 姜晓明刘强
Owner TIANJIN UNIV
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