A multifunctional multi-gear current detection circuit and method
A technology of current detection circuit and detection method, applied in the direction of measuring current/voltage, only measuring current, measuring device, etc., can solve the problems of increasing circuit area, cumbersome circuit detection, increasing detection resources, etc., to reduce power consumption and area , The detection period can be adjusted, and the circuit area is small.
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Embodiment 1
[0032] This embodiment is an application example of the same gating clock, such as Figure 4 As shown, clk1, clk2, and clk3 are three groups of gating clocks of the gating circuit, and the three clock periods are the same. When the level is high, the reference voltage of over-current gear 1, the reference voltage of over-current gear 2 and the reference voltage of short-circuit detection are selected respectively, and only one gear is turned on each time. clk4 is the comparator detection clock, and the comparator works when the clk4 clock is at a high level, so the high level of clk4 includes the high levels of all clocks of clk1, clk2, and clk3. Because the clocks of clk1, clk2, and clk3 are turned on to different gears respectively, the comparator performs the detection of overcurrent gear 1, the detection of overcurrent gear 2 and the comparison of short circuit detection respectively in sequence. clk5, clk6, and clk7 latch the results of gear position detection respective...
Embodiment 2
[0034] This embodiment is an application example in which the gating clock periods are different.
[0035] Such as Figure 5 As shown, clk1, clk2, and clk3 are used as the gating clocks of the gears, and can also be regarded as the detection clocks of the corresponding gears.
[0036] clk3 is the short-circuit detection clock, so that its detection cycle is the shortest, set as Tclk3;
[0037] clk2 is the overcurrent gear 2 detection clock, and the period is set to m times of clk3: Tclk2=Tclk3*m;
[0038] clk1 is the detection clock for overcurrent gear 1, and the period is set to n times of clk2, and n*m times of clk3: Tclk1=Tclk3*n*m;
[0039] clk4 is the comparator detection clock, the period is the same as clk3: Tclk4=Tclk3.
[0040] However, only one detection gear can be turned on at the same time. Therefore, when the gears are turned on at the same time, the priority is clk1>clk2>clk3 to generate the strobe clock, that is, when the over-current gear 1 is turned on, ...
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