Acquisition method for high-speed ADC (Analog-to-Digital Converter) signals capable of reducing noise
A collection method and signal technology, used in electronic circuit testing, measuring devices, instruments, etc., can solve the problems of low signal noise, clock jitter that cannot meet high-speed signal input requirements, and high input signal frequency, achieving low cost and satisfying chip testing. desired effect
Inactive Publication Date: 2019-04-09
SINO IC TECH
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Problems solved by technology
[0002] In the prior art, the jitter of the main clock of the testing machine cannot meet the requirements of high-speed signal input
When using a high-speed analog-to-digital converter (ADC), it is hoped that the performance can reach the signal-to-noise ratio value specified in the product specification. The main clock frequency jitter of the testing machine used in the prior art is relatively large, but the input signal frequency is relatively high, and the jitter needs to be small. The signal-to-noise ratio of the test is low
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[0012] The present invention will be further described below in conjunction with the accompanying drawings and embodiments.
[0013] ADC: Convert analog signal to digital signal.
[0014] Testing machine: a device that automatically detects whether the chip is good or bad.
[0015] The purpose of the technical invention is to test the high-speed ADC chip under the testing machine without the main clock of the testing machine.
[0016] The input signal has different jitter requirements at different frequencies. The higher the signal frequency, the higher the jitter requirements, and the shorter the system clock jitter time is. The main clock jitter of the tester is fixed at a certain frequency. To test high-speed signals, the jitter time of the tester should be less than that of the high-speed signal input. The current solution is to select a suitable testing machine to test high-speed signals. If the jitter of the main clock of the testing machine is greater than the jitter ...
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The invention discloses an acquisition method for high-speed ADC signals capable of reducing the noise. The acquisition method comprises steps of: installing a crystal oscillator that meeting the requirements on a test board of a test chip individually; acquiring data with a low-jitter crystal oscillator as a system clock, without using an internal clock inside a tester; and sending accurate acquired values to the tester. According to the acquisition method for high-speed ADC signals capable of reducing the noise, the method solves the problem that the jitter of the main clock of the test machine is large, so that large noise is generated, when a high-speed ADC chip is tested. Since the test machine has no smaller jitter parameters, the method adds a low-jitter crystal oscillator on the test board, and uses the crystal oscillator as the main clock frequency of the sample. The method is low in cost, does not need to replace a test machine in a higher standard, and meets the requirementsof a chip test.
Description
technical field [0001] The invention relates to the technical field of high-speed ADC chip testing, and more particularly relates to a method for collecting high-speed ADC signals to reduce noise. Background technique [0002] In the prior art, the jitter of the main clock of the testing machine cannot meet the requirements of high-speed signal input. When using a high-speed analog-to-digital converter (ADC), it is hoped that the performance can reach the signal-to-noise ratio value specified in the product specification. The main clock frequency jitter of the testing machine used in the prior art is relatively large, but the input signal frequency is relatively high, and the jitter needs to be small. The signal-to-noise ratio of the test is low. In other words, the faster the signal changes, the greater the jitter of the sampling clock, and the greater the resulting noise, see figure 1 . Contents of the invention [0003] The technical scheme that the present invention...
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IPC IPC(8): G01R31/28
CPCG01R31/2851
Inventor 王斌祁建华余琨顾辉王华凌俭波
Owner SINO IC TECH