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SGT device and manufacturing method thereof

A device and conductivity type technology, applied in the field of semiconductor integrated circuit manufacturing, can solve problems such as difficulty, high cost of epitaxial process, increase process complexity, etc., and achieve the effect of reducing on-resistance

Active Publication Date: 2019-06-25
SHENZHEN SANRISE TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0027] The second to fourth doping distribution methods all involve multi-layer epitaxial processes. Because the epitaxial process itself is complex and costly to implement, it is difficult to implement these involving multi-layer epitaxial processes, which increases the complexity of the process.

Method used

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  • SGT device and manufacturing method thereof
  • SGT device and manufacturing method thereof
  • SGT device and manufacturing method thereof

Examples

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no. 1 example

[0109] The manufacturing method of the SGT device of the first embodiment of the present invention includes the following steps:

[0110] Step 1, providing a heavily doped semiconductor substrate 1 of the first conductivity type. Preferably, the semiconductor substrate 1 is a silicon substrate, and the subsequently formed first epitaxial layer 2 is a silicon epitaxial layer.

[0111] Step 2: Forming a lightly doped first epitaxial layer 2 of the first conductivity type on the surface of the semiconductor substrate 1 by using a uniformly doped epitaxial process.

[0112] Step 3, forming a sacrificial oxide layer on the surface of the first epitaxial layer 2; as Figure 9 As shown, ion implantation of the first conductivity type is used to form an ion implantation region in the longitudinal field plate coverage region of the first epitaxial layer 2, and the ion implantation region introduces a first A conductivity type doping peak region.

[0113] Preferably, the implantation...

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Abstract

The invention discloses an SGT device. The SGT device comprises a semiconductor substrate, a first epitaxial layer in the surface of the substrate, shielding polycrystalline silicon, a polycrystallinesilicon gate, a channel region, a source region and a drain region. The body doped concentration of the first epitaxial layer is uniform; and an area, covered by the shielding polycrystalline silicon, of the first epitaxial layer is a longitudinal field plate coverage area, an ion implantation area is superposed to the longitudinal field plate coverage area, the ion implantation area introduces afirst conductive type doping peak region to the longitudinal field plate coverage area, and the doping concentration of the first conductive type doping peak region satisfies that the lateral voltagebetween the longitudinal field plate coverage area and the shielding polycrystalline silicon is completely exhausted in the corresponding vertical position during work of the SGT device. The invention also discloses a manufacture method of the SGT device. The on resistance of the device is reduced without influencing the breakdown voltage of the same, the technical cost is lower, and the reverserecovery Irrm and Qrr of a body diode can be reduced.

Description

technical field [0001] The invention relates to the field of manufacturing semiconductor integrated circuits, in particular to a shield gate trench (Shield Gate Trench, SGT) device; the invention also relates to a method for manufacturing the SGT device. Background technique [0002] In the field of medium and low voltage devices with a withstand voltage of 20V to 200V, SGT devices are widely used because of their low specific on-resistance and low gate-drain coupling capacitance. The gate structure of SGT devices includes shielded polysilicon and polysilicon gate. Shielded polysilicon is usually also called source polysilicon, which are all formed in the trench. According to the different settings of shielded polysilicon and polysilicon gate in the trench, it is usually divided into upper and lower structures and left and right structures. . In the upper and lower structure, the shielding polysilicon is located at the bottom of the trench, the polysilicon gate is located a...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/265H01L23/58H01L27/04H01L21/762
Inventor 肖胜安
Owner SHENZHEN SANRISE TECH CO LTD