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Image data generator based on video graphic array VGA time sequence standard

An image data and generator technology, which is applied in the directions of picture signal generators, image communication, color TV components, etc., can solve the problems of image data generators without VGA image data, loss of image data, etc., to reduce design Complexity, the effect of reducing complexity, enhancing flexibility

Inactive Publication Date: 2019-07-05
DEEPBLUE TECH (SHANGHAI) CO LTD
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

And based on the existing VGA image data generator, the timing signal output and the image data output are often independent of each other, that is to say, the image data will also be output in the non-display timing segment, thus causing the loss of the image data
[0004] At present, there is no image data generator that is better used to generate VGA image data in the prior art.

Method used

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  • Image data generator based on video graphic array VGA time sequence standard
  • Image data generator based on video graphic array VGA time sequence standard
  • Image data generator based on video graphic array VGA time sequence standard

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Embodiment Construction

[0029] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention more clear, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention.

[0030] The timing sequence of the VGA in the prior art is introduced below.

[0031] Both column timing and row timing defined in the Video Electronics Standards Association (VESA) require a sync pulse (Sync a), a display back porch (Back porch b), a display timing segment (Displayinterval c) and a display front porch (Front porch d) Four parts. For details, please refer to figure 1 , the column synchronization signal defines the range of the horizontal column of a frame of image. The signal is divided into 4 parts, that is, the Sync part, the display trailing edge part, the display timing segment part and the display leading edge part;

[0032] The line sy...

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Abstract

The embodiment of the invention provides an image data generator based on a video graphic array VGA time sequence standard. The image data generator is used for FPGA design and verification related toimage processing. The image data generator comprises a time sequence signal generation module which is used for generating a row synchronization signal, a column synchronization signal and a displaytime sequence segment indication signal, wherein the display time sequence segment indication signal is used for representing whether the row synchronization signal and the column synchronization signal are located in a display time sequence segment of a frame of image or not; and the image generation module which is connected with the time sequence signal generation module and is used for outputting image data when the display time sequence section indication signal is at a high level.

Description

technical field [0001] The application belongs to the field programmable gate array FPGA technical field, and in particular relates to an image data generator based on the video graphics array VGA timing standard. Background technique [0002] Now, many modules based on Field-Programmable Gate Array (Field-Programmable Gate Array, FPGA) design, especially image processing-related modules, for example, a module for calculating the parallax range of two images based on FPGA, or based on The module implemented by FPGA is used to calculate the Hamming distance between pixels, or the module implemented based on FPGA is used to convert color images into grayscale images. When the FPGA module design is completed, the designed module needs to be verified. [0003] During verification, it is often necessary to input clock, control signal and image signal to the module designed based on FPGA, wherein the control signal often refers to the column synchronization signal (Horizontal Syn...

Claims

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Application Information

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IPC IPC(8): H04N5/06H04N9/04
CPCH04N5/06H04N23/10
Inventor 陈海波
Owner DEEPBLUE TECH (SHANGHAI) CO LTD
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