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Etching method of semiconductor wafer structure

A semiconductor and wafer technology, applied in the field of semiconductor wafer structure etching, can solve the problems of small etch groove aperture, leakage current, etch groove offset, etc., so as to improve the uniformity of etching, enhance the etching rate, The effect of increasing the aperture

Active Publication Date: 2019-09-17
CHANGXIN MEMORY TECH INC
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Problems solved by technology

[0010] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a method for etching a semiconductor wafer structure, which is used to solve the problem in the prior art that the height of the edge ring is not equal to the height of the wafer to be etched. The uneven distribution of etching gas on the surface of the wafer to be etched makes the aperture of the etching groove in the edge area smaller, the etching groove in the edge area is offset, and the adjacent two etching grooves are connected together, resulting in leakage ; and because the angle between the extension direction of the etching groove in the edge area and the vertical direction is too large, or the direction of the plasma is too crooked, the etching stops, which affects the etching uniformity of the wafer to be etched question

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  • Etching method of semiconductor wafer structure
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Embodiment Construction

[0088] Embodiments of the present invention are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present invention.

[0089] see Figure 10-Figure 23 . It should be noted that the diagrams provided in this embodiment are only schematically illustrating the basic idea of ​​the present invention, and only the components related to the present invention are shown in the diagrams rather than the number, shape and shape of the components in actual implementation. Dimensional drawing, the type, quantity and proportion of each component can be changed arbitrarily d...

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Abstract

The invention provides an etching method of a semiconductor wafer structure. The etching method comprises the steps of: etching a semiconductor wafer structure to be etched, wherein the flow of etching gas introduced into an edge area is greater than that of etching gas introduced into a central area, and the radio frequency bias power applied to the semiconductor wafer structure to be etched is greater than the standard radio frequency bias power, so that the etching rate of the edge area is enhanced, the etching uniformity of the semiconductor wafer structure to be etched is improved, the electric leakage caused by the connection of two adjacent etching grooves is avoided, the resistance value is effectively reduced, and the quality of the subsequently prepared semiconductor wafer structure is improved.

Description

technical field [0001] The invention relates to the technical field of wafer manufacturing of semiconductor devices, in particular to an etching method for a semiconductor wafer structure. Background technique [0002] Etching is a technology that removes materials using chemical reactions or physical impacts. In fact, in a narrow sense, it is photolithographic etching. Etching treatment to remove the part that needs to be removed. Generally, etching technology can be divided into wet etching and dry etching. It is a very important process in semiconductor manufacturing process, microelectronics manufacturing process and micro-nano manufacturing process. The step is the main process of patterning (pattern) processing associated with photolithography. [0003] Plasma etching is the most common form of dry etching. Its principle is: the gas exposed to the electronic region forms a plasma. When the plasma is accelerated by an electric field, it will release enough energy to p...

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Application Information

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IPC IPC(8): H01J37/32H01L21/311
CPCH01J37/32137H01J37/32449H01J2237/3343H01L21/31116H01L21/31144
Inventor 不公告发明人
Owner CHANGXIN MEMORY TECH INC