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Calculation method and device of space-based supercomputing platform

A computing method and computing device technology, applied in the field of data computing, can solve problems such as inconsistent internal and external interface standards of the spaceborne computer architecture, poor versatility of different satellite platforms, and different loads, etc.

Pending Publication Date: 2019-09-24
INST OF SOFTWARE - CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] In view of this, the object of the present invention is to provide a computing method and device for a space-based supercomputing platform, to solve the problem of inconsistency in the internal and external interface standards of the space-borne computer architecture in the prior art, and the common use of different satellite platforms and different loads. Weak technical issues

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  • Calculation method and device of space-based supercomputing platform
  • Calculation method and device of space-based supercomputing platform
  • Calculation method and device of space-based supercomputing platform

Examples

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Embodiment 1

[0060] figure 1 The flow chart of the calculation method of the space-based supercomputing platform provided by the embodiment of the present invention.

[0061] refer to figure 1 , the method includes the following steps:

[0062] Step S101, collect by a signal collection device to obtain first input data of a target object, wherein the target object includes at least one of an on-board payload, a communication unit, an antenna, and an actuator.

[0063] In this embodiment, the signal acquisition device includes but not limited to various sensors of the satellite system, and the input data of different target objects may include multiple interface protocols, such as CameraLink communication protocol, Universal Asynchronous Receiver / Transmitter (Universal Asynchronous Receiver / Transmitter, UART for short) bus communication protocol, Serial Peripheral Interface (Serial Peripheral Interface, SPI for short) bus protocol, etc. On-board payloads include but are not limited to vi...

Embodiment 2

[0099] Figure 6 It is a schematic diagram of the computing device of the space-based supercomputing platform provided by the embodiment of the present invention.

[0100] refer to Figure 6 , the device includes a signal acquisition device 10 , an interface expansion board 20 , a computing node 30 , and a storage node 40 . The signal acquisition device 10 is used to obtain the first input data of the target object through acquisition, wherein the target object includes at least one of an on-board load, a communication unit, an antenna, and an actuator; the interface expansion board 20 is used to convert the first input data The data is converted according to the preset interface protocol to obtain the second input data; the calculation node 30 is used to calculate the second input data to obtain a calculation result; the storage node 40 is used to store the calculation result.

[0101] Further, refer to figure 2 The interface expansion board 20 includes but not limited to...

Embodiment 3

[0108] An electronic device provided by an embodiment of the present invention, such as Figure 7 As shown, the electronic device includes a memory 71, a processor 72, and a computer program that can run on the processor 72 is stored in the memory 71. When the processor 72 executes the computer program, the steps of the method provided by the first embodiment above are implemented.

[0109] refer to Figure 7 , the electronic device also includes: a bus 73 and a communication interface 74, the processor 72, the communication interface 74 and the memory 71 are connected through the bus 73; the processor 72 is used to execute executable modules stored in the memory 71, such as computer programs.

[0110] Wherein, the memory 71 may include a high-speed random access memory (RAM, Random Access Memory), and may also include a non-volatile memory (non-volatile memory), such as at least one disk memory. The communication connection between the system network element and at least one...

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Abstract

The invention provides a calculation method and device of a space-based supercomputing platform. The method includes: using a signal acquisition device to carry out acquisition, and obtaining first input data of the target object, wherein the target object comprises at least one of an on-board load, a communication unit, an antenna and an execution mechanism; then, converting the first input data according to a preset interface protocol to obtaining second input data, calculating the second input data through the calculation node; obtaining calculation results, and finally, storing the calculation result through the storage node. Therefore, an architecture of a reconfigurable interface expansion board card and peripheral equipment is adopted; the interface expansion board card carries out data transmission with each sensor, each actuating mechanism, each communication unit or each antenna of the satellite system; the expansion board card and the internal computing node are interconnected through the standard CPCI board-level connector, so that the technical problem that in the prior art, universality of satellite-borne computer architecture on different satellite platforms and different loads is not high is solved.

Description

technical field [0001] The invention relates to the technical field of data computing, in particular to a computing method and device for a space-based supercomputing platform. Background technique [0002] With the continuous advancement of satellite technology, the performance of on-board payloads continues to improve, and the performance requirements for space-based computing platforms are also getting higher and higher. At present, there are two main methods for onboard high-performance computers: one is to use a combination of a processor and an accelerator, using an application specific integrated circuit (Application Specific Integrated Circuit, referred to as ASIC) or a digital signal processor (Digital Signal Processing, referred to as DSP) ) as an accelerator to improve the processing capability of the onboard computer; the other is to use a multi-processor parallel strategy to design an embedded parallel computer architecture to solve the problem of single process...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F13/38G06F13/42
CPCG06F13/382G06F13/4221
Inventor 夏玉立赵军锁张玉凤闫小盼
Owner INST OF SOFTWARE - CHINESE ACAD OF SCI
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