Message expansion circuit in low-power-consumption SHA256 algorithm

Abstract

The invention provides a message expansion circuit in a low-power-consumption SHA256 algorithm, and belongs to the technical field of digital integrated circuits. The problem that a message expansioncircuit in an SHA256 circuit is too high in power consumption is solved. The technical scheme is as follows: the circuit comprises a message expansion circuit in a low-power-consumption SHA256 algorithm. The message expansion circuit comprises a group of 512-bit message and shift multiplexing registers M, four groups of three-state gates Gate1, Gate2, Gate3 and Gate4, a group of operational logiccircuits and a group of 6-bit comparators P1. The beneficial effects of the invention are that the comparator and the three-state gate turn-off operation circuit are used for input, thereby saving thepower consumption, and achieving the purpose of saving the power consumption.

Description

technical field [0001] The invention relates to the technical field of digital integrated circuits, in particular to a message extension circuit in a low-power consumption SHA256 algorithm. Background technique [0002] The Secure Hash Algorithm SHA (Secure Hash Algorithm) is a series of cryptographic hash functions designed by the National Security Agency (NSA) and released by the National Institute of Standards and Technology (NIST), including SHA-1, SHA-224, SHA- 256, SHA-384, and SHA-512 variants. It is mainly applicable to the digital signature algorithm (Digital Signature Algorithm DSA) defined in the digital signature standard (DigitalSignature Standard DSS). The characteristic of the SHA algorithm is that the message cannot be recovered from the message digest, and two different messages will not produce the same message digest. [0003] Applications of SHA: file verification, password encryption, workload proof, etc. [0004] SHA256 is one of the more commonly us...

AI Technical Summary

Problems solved by technology

[0010] Among them, W0-W15 already exists when the message M is written, then the first round of calculation W16, the second round of calculation W17, and so on, in the 48th round, W63 has been calculated, and in the 49th round In the 64 rounds, the formula ② no longer needs to be calculated, but the input of the operational logic circuit required to realize the formula ② will still be reversed

Unnecessary dynamic power consumption is generated

16 of the 64 rounds are invalid, resulting in nearly 33.3% more dynamic power consumption

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