Low loss galvanic isolation circuitry

Abstract

In described examples, a digital isolator module (160) includes isolation circuitry (120). The isolation circuitry (120) includes a capacitive coupled galvanic isolation circuit (130) with first and second coupling capacitors (C1, C2) individually including a first plate (128t, 136t) and a second plate (128b, 136b), and a bond wire (134) connecting the first plates (128t, 136t). A first circuit (124a) has a first inductor (LF) coupled to form a first resonant tank circuit with a first parasitic capacitor (CP1) associated with the second plate (128b) of the first coupling capacitor (C1). A second circuit (124b) has a second inductor (LF) coupled to form a second resonant tank circuit with a second parasitic capacitor (CP2) associated with the second plate (136b) of the second coupling capacitor (C2).

Description

Background technique [0001] Isolation is often required for interconnected electrical systems that exchange data and power with each other. For example, two systems can be powered by different power supplies that do not share a common ground connection. Transformer isolation methods involve magnetic fields, and the resulting electromagnetic interference (EMI) may be undesirable in some applications. Additionally, transformer isolation often requires external transformer components, and these solutions require significant circuit or board area and are costly. Optical isolation avoids the EMI problems associated with transformer isolation. However, optical circuits are usually expensive and have limited speed. Capacitive coupling or AC coupling using capacitors connected in series can be used to provide isolation for the transmitted data signal. However, capacitor-based isolation solutions often involve parasitic capacitances that absorb signal energy and cause significant s...

AI Technical Summary

Problems solved by technology

However, capacitor-based isolation solutions typically involve absorbing signal energy and causing significant signal path attenuation due to bottom plate parasitic capacitance that shunts the signal energy to local ground

This results in poor power efficiency, and large parasitic capacitances can severely limit bandwidth, leading to data rate limitations and increased data latency

Additionally, these problems in capacitively coupled isolation devices can lead to poor common-mode performance

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