Semiconductor memory structure and word line manufacturing method thereof

Abstract

The invention provides a semiconductor memory structure and a word line manufacturing method thereof. The manufacturing method includes the steps that: multiple word line grooves are prepared in a substrate, each word line groove is formed by horizontally communicating a first word line groove and a second word line groove which are different in depth, and asymmetric embedded word lines are manufactured in the substrate based on the word line grooves; the embedded word line manufactured by adopting the method is used as a grid electrode of a MOS transistor, and the distance between the sourceelectrode and the drain electrode of the MOS transistor can be increased, so that the MOS transistor has a longer channel, and the short channel effect is effectively avoided. According to the invention, the effective distance between the word lines can be increased under the same word line density, so that the coupling between the word lines is reduced. The deviation directions of the bottom endsof the two adjacent word lines are opposite, so that the coupling between the transistors can be obviously reduced.

Description

technical field [0001] The invention belongs to the field of integrated circuit manufacturing, and relates to a semiconductor memory structure and a word line manufacturing method thereof. Background technique [0002] As semiconductor storage devices (such as dynamic random access memory (DRAM)) become highly integrated, the area of ​​the unit cell on the semiconductor substrate will gradually shrink accordingly, and the channel included in the metal oxide semiconductor (MOS) transistor The length will also gradually decrease, and the decrease of the channel length will easily cause the short channel effect. In order to maintain the high integration of semiconductor memory devices, measures need to be taken to limit the short channel effect. [0003] Buried word lines (also referred to as buried gates) provide a new option for increasing the integration density of semiconductor devices. The embedded word line refers to burying the word line inside the semiconductor substr...

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Problems solved by technology

[0005] In view of the above-mentioned shortcomings of the prior art, the purpose of the present invention is to provide a semiconductor memory structure and its word line manufacturing method, which is used to solve the problem of the existing buried gate word line structure with the high integration of devices. The semiconductor memory structure cannot effectively prevent the short channel effect

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