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Substrate structure and manufacturing method thereof

A manufacturing method and substrate technology, which are applied in the fields of printed circuit manufacturing, electrical connection formation of printed components, electrical connection of printed components, etc., can solve the problems of many process steps, unfavorable shape of blind holes, and high cost, so as to reduce production cost and slow down Copper plating rate and the effect of simplifying process steps

Active Publication Date: 2019-12-03
何崇文
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  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

However, the cost required by the above method is high and the process steps are also many
In addition, the process and structure of blind holes formed by laser drilling are limited by the process and structure of via holes formed by electroplating and filling, and the density of blind holes is not easy to increase, and the shape of blind holes is not conducive to making linear or block-shaped Bumps, so the above-mentioned process is not easy to achieve the heat dissipation function required by high-power chips

Method used

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  • Substrate structure and manufacturing method thereof
  • Substrate structure and manufacturing method thereof
  • Substrate structure and manufacturing method thereof

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Embodiment Construction

[0083] Reference will now be made in detail to the exemplary embodiments of the present invention, examples of which are illustrated in the accompanying drawings. Wherever possible, the same reference numbers will be used in the drawings and description to refer to the same or like parts.

[0084] Figure 1A to Figure 1I It is a schematic cross-sectional view illustrating a manufacturing method of a substrate structure according to an embodiment of the present invention. It should be noted that, Figure 1F It is represented by a stereogram. Please refer to Figure 1A According to the manufacturing method of the substrate structure of this embodiment, first, a carrier 10 is provided, wherein the carrier 10 has a top surface 11 and a bottom surface 13 opposite to each other. In detail, the carrier 10 of this embodiment includes a core layer 12 and two copper foil layers 14 , wherein the copper foil layers 14 are respectively disposed on two opposite disposition surfaces 12 a ...

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Abstract

The invention provides a substrate structure and a manufacturing method thereof. The substrate structure comprises a dielectric layer, a first patterned circuit layer, at least one first copper column, at least one second copper column and a second patterned circuit layer. The first patterned circuit layer is inlaid in the dielectric layer and comprises at least one first connecting pad and at least one second connecting pad. The surface of the first patterned circuit layer is flush with the lower surface of the dielectric layer. The at least one first copper column is inlaid in the dielectriclayer and located on the at least one first connecting pad. The at least one second copper column is inlaid in the dielectric layer and located on the at least one second connecting pad. The first cross-sectional width of the at least one first copper column is greater than the second cross-sectional width of the at least one second copper column, The first width of the at least one first connecting pad is larger than the first section width of the at least one first copper column. The second width of the at least one second connecting pad is larger than the second section width of the at least one second copper column.

Description

technical field [0001] The present invention relates to a substrate structure and its manufacturing method, and in particular to a substrate structure with better heat dissipation effect and its manufacturing method. Background technique [0002] Generally speaking, if it is desired to form a via hole or a conductive hole, after forming a dielectric layer, a blind hole can be formed by eg laser drilling to expose the circuit layer under the dielectric layer. Then, the copper layer is electroplated in the blind hole and on the dielectric layer by means of electroplating, so as to form another circuit layer and the via hole. However, during the electroplating process, since there is no dielectric layer in the blind holes formed by the laser drilling method, it is necessary to fill the holes with copper material by electroplating. In order to avoid the quality problem of depressions on the copper surface above the blind holes, the existing process steps need to increase the th...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H05K1/02H05K1/11H05K3/40
CPCH05K1/0204H05K1/11H05K3/4046
Inventor 何崇文
Owner 何崇文
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