GaN-based PIN diode device structure and preparation method thereof

Abstract

The invention relates to a GaN-based PIN diode device structure and a preparation method thereof. The diode device structure sequentially comprises a substrate, a buffer layer and an N-type heavily-doped semiconductor transmission layer in the epitaxial growth direction, wherein an N-type intrinsic layer is distributed on the N-type heavily-doped semiconductor transmission layer, a P-type heavily-doped semiconductor transmission layer grows on the N-type intrinsic layer, the annular part of the outer edge of the top of the P-type heavily-doped semiconductor transmission layer is an N-type insertion layer, and the N-type insertion layer is obtained by injecting N-type ions into the material of the P-type heavily-doped semiconductor transmission layer; an annular insulating layer grows on the outer edge of the N-type insertion layer; and then the current expansion layer and the P-type ohmic electrode are sequentially arranged, and an N-type ohmic electrode is located on the exposed N-type heavily-doped semiconductor transmission layer. According to the invention, the concentration of edge carriers is effectively reduced, more uniform current expansion is realized, and the reverse breakdown voltage is not influenced.

Description

technical field [0001] The invention relates to the technical field of power electronic devices, in particular to a novel PIN diode device structure which reduces the edge carrier concentration, suppresses Auger recombination and slows down the current crowding effect. Background technique [0002] PIN diodes are mainly composed of heavily doped n+ type and p+ type semiconductor transmission layers, sandwiching an intrinsic layer (I layer) with high resistivity, so as to achieve a high reverse breakdown voltage and achieve a certain Signal modulation capabilities in the frequency range. The PIN diode is based on the PN junction structure, through the injection of minority carriers (referred to as minority), to realize the forward open-state working process, this process is called conductance modulation, and the drift region is compared by conductance modulation during forward conduction Small on-resistance, so that the device can use the low-doped drift region to obtain a h...

AI Technical Summary

Problems solved by technology

In this type of structure, after exposing n-type GaN by means of mesa etching, p-type ohmic electrodes and n-type ohmic electrodes are prepared on the surface of p-GaN layer and n-GaN layer, a major disadvantage of this design It is in the forward working area of ​​the device, the current is crowded at the edge of the table, so the Auger recombination effect is more obvious

In order to slow down the crowding effect of the current at the edge of the mesa, one of the ways is to increase the doping concentration or increase the thickness of the N-type heavily doped semiconductor electron transport layer, thereby reducing the resistance of the layer and slowing down the edge crowding effect of the current ( Zhang, et al. "Reduction of on-Resistance and Current Crowding in Quasi-Vertical GaN Power Diodes." Applied Physics Letters 111,16(2017):163506.), but this way N doping is too heavy, will be in the crystal A large number of defects are introduced into the lattice, the quality of the crystal decreases, and the leakage current increases

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