Overlay error compensation method and system for three-dimensional device

Abstract

The invention provides an overlay error compensation method for a three-dimensional device. The method comprises the following steps that: the warping height of a wafer is measured on the basis of themeasurement of a first overlay error between wafer overlay marks, the first overlay error is taken as a reference coordinate, and a height contour diagram is constructed based on the reference coordinate and the warping height of the wafer; feature analysis is performed on the height contour diagram, so that height curved surface contour data are obtained; calculation is performed based on the layer information of the overlay marks and the height curved surface contour data, so that a second overlay error is obtained; and the second overlay error is subtracted from the first overlay error, sothat corrected data can be obtained, and overlay errors measured by adopting a traditional overlay measurement method are compensated based on the corrected data. With the overlay error compensationmethod for the three-dimensional device adopted, overlay errors caused by height difference due to the deformation and warping of the wafer are eliminated. The invention further provides an overlay error compensation system of a three-dimensional device. According to the system, a laser ranging unit is additionally adopted, so that the warping height of the wafer can be accurately measured, and the correction and performance improvement of an existing overlay measurement system are achieved.

Description

technical field [0001] The invention relates to the field of integrated circuit equipment manufacturing, in particular to an overlay error compensation method and system for three-dimensional devices. Background technique [0002] Overlay error refers to the offset between two adjacent layers of graphics on the wafer. Since the manufacture of integrated circuit chips is made by superimposing multiple circuit layers, if the graphics of adjacent layers are not aligned, the chip will not work properly. Work. Therefore, it is extremely important to ensure the pattern alignment of adjacent layers of the wafer. Traditionally, since the warpage of the wafer is not serious and the thickness of the film layer between the overlay marks is relatively thin, the overlay error caused by the warpage of the wafer accounts for a small proportion of the total overlay error and can be ignored. Existing overlay measurement methods and measurement systems seldom consider wafer surface warpage ...

AI Technical Summary

Problems solved by technology

[0004] In view of the above problems, the object of the present invention is to provide an overlay error compensation method and system for a three-dimensional device, which is used to solve the overlay error caused by the height difference caused by wafer deformation and warpage, and realize the overlay error compensation for the current Overlay measurement system fixes and performance improvements

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