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Processor instruction set testing method and device

A technology of processor instructions and testing methods, applied in the field of processors, can solve problems such as inability to guarantee coverage, lack of testing, and computer system crashes of test programs

Active Publication Date: 2021-05-14
INST OF INFORMATION ENG CHINESE ACAD OF SCI
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0003] However, the method of random testing still has certain limitations
First of all, the random testing method cannot guarantee the coverage rate, and its testing scope only focuses on the part of the instructions defined in the instruction set manual, while there is a lack of testing for undefined instructions
Secondly, the method of random testing is only suitable for model verification before chip manufacturing, and it is difficult to carry out on a real physical machine. This is because the method of random testing needs to actually execute instructions, and some instructions (such as jump instructions) cannot Execution may lead to unpredictable behavior, eventually leading to the crash of the test program or even the entire computer system
Finally, the method of random testing requires manual comparison of instruction execution results, which is not only cumbersome and error-prone

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  • Processor instruction set testing method and device

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Embodiment Construction

[0023]In order to make the objects, technical solutions, and advantages of the present invention more clearly, the technical solutions in the embodiments of the present invention will be described in contemplation in the embodiments of the present invention, and will be described, and the embodiments described in the embodiments of the present invention will be described. It is a part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, those of ordinary skill in the art will belong to the scope of the present invention without all other embodiments obtained without creative labor.

[0024]For the problem of random test in the related art, embodiments of the present invention provide a processor instruction set test method. Seefigure 1 The method includes: 101, for the pre-processing file, acquire instruction coding and first command name of any instruction, input to the instructionler, output unprocessed second The...

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Abstract

Embodiments of the present invention provide a processor instruction set testing method and device, which belong to the technical field of processors. Including: for any instruction in the preprocessing file, obtain the instruction code and the first instruction name of any instruction, input the instruction code of any instruction into the decompiler, and output the unprocessed second instruction name; according to the An instruction name and a second instruction name, and it is judged whether any instruction has a defect. The advantages of the embodiments of the present invention are as follows: since all instructions in the preprocessing file can be tested, which may also contain undefined instructions, the coverage rate is high; since the test process does not need to execute instructions, the test process can be executed on a real machine and Stability can be maintained; since the testing process can be designed to be executed automatically, the whole testing process is simple and less prone to errors.

Description

Technical field[0001]The present invention relates to the field of processor, and more particularly to a processor instruction set test method and apparatus.Background technique[0002]The existing processor instruction set test method mainly has two types of random testing and formal verification. Formal verification method creates a state machine model through mathematical means, automatically generates test cases, and the advantage is that the coverage is high, but the problem of existing state space explosion can only be used for smaller components. Now the mainstream instruction set test method is random test, random testing method generates a series of instruction sequences by a random instruction generator, and then executes these instruction sequences on the physical model and reference model, and then executes the instructions of the two models Perform comparison, thus discovering design defects.[0003]However, the method of random test still has certain limitations. First, th...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/36
CPCG06F11/3676G06F11/3688
Inventor 孟丹李丹萍朱子元史岗
Owner INST OF INFORMATION ENG CHINESE ACAD OF SCI