A non-volatile memory processing circuit and method

Abstract

An embodiment of the present invention provides a non-volatile memory processing circuit and method, the method comprising: a charging circuit connected to a storage unit selection circuit for charging the bit line of the first storage unit string; and charging the source line ; After the bit line of the first memory cell string is charged stably, the bit line of the second memory cell string is charged through the source line; the charging circuit is connected with the comparison circuit, and is used for when the bit line of the second memory cell string is charged stably , charge the comparison circuit, and, when the comparison circuit is charged stably, end the charging of the comparison circuit and the storage unit selection circuit; the storage unit selection circuit and the comparison circuit form a current loop, so that the comparison circuit outputs a high level according to the current loop or low level. The embodiment of the present invention shields the capacitance crosstalk between the first storage unit string and the second storage unit string, so when the storage unit in the non-volatile memory is read, the data of each storage unit can be accurately read .

Description

technical field [0001] The invention relates to the technical field of memory processing, in particular to a nonvolatile memory processing circuit and method. Background technique [0002] With the development of various electronic devices and embedded systems, non-volatile memory devices are widely used in electronic products. Taking the non-volatile memory NAND flash memory (NAND Flash Memory) as an example, the NAND memory is composed of a plurality of storage cells (cells), and the storage cells can be negative threshold storage cells, that is, the storage cells whose conduction threshold voltage is a negative value; It can be a positive threshold memory cell, that is, a memory cell whose on-threshold voltage is positive; according to the on-current of the memory cell during operation, the data state of the memory cell can be read, such as erased state, programmed state, etc. [0003] In the prior art, when reading data from each storage unit of a non-volatile memory, a...

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Problems solved by technology

[0004] However, the inventor found in the process of studying the above-mentioned technical solution that the above-mentioned technical solution has the following defects: each BL voltage will be affected by the connected crosstalk capacitance, which will cause some memory cell data reading errors, and the data reading of the storage cells The accuracy is not high

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