Side wall electrode resistive random access memory structure and preparation method thereof

Abstract

The invention discloses a side wall electrode resistive random access memory structure and a preparation method thereof. The structure comprises a first dielectric layer, a low-mobility material layer, a first metal plug, a first electrode, a resistive random access layer and a second electrode, wherein the low-mobility material layer is arranged on the first dielectric layer; the first electrodeand the resistive random access layer are arranged on the low-mobility material layer; the first electrode, the resistive random access layer and the second electrode are sequentially connected; the first metal plug penetrates through the first dielectric layer and the low-mobility material layer, and the upper end of the first metal plug is connected with the first electrode. According to the side wall electrode resistive random access memory structure provided by the embodiment of the invention, at least one electrode is arranged on one side of the resistive random access layer in the horizontal direction. Compared with the prior art, the height of the resistive random access memory structure is reduced, the size of the RRAM is reduced, and embedded integration of the RRAM is facilitated.

Description

technical field [0001] The invention relates to the field of memory technology, in particular to a sidewall electrode resistive memory structure and a preparation method thereof. Background technique [0002] Resistive Random Access Memory (RRAM), also called Resistive Random Access Memory (RRAM), is a non-volatile memory device that records and stores data information based on resistance changes. Because of its high density, low cost, fast access speed and breakthrough technology development, resistive memory is considered to be a strong competitor for the next generation of new memory. It has great potential in embedded devices, AI fields, edge computing fields, etc. Very broad application prospects. Traditional sandwich RRAM devices such as figure 1 As shown, in order to ensure the electrical performance of RRAM devices, there are certain requirements for the thickness of the bottom electrode-resistive layer-top electrode. The height of through holes in the back stage ...

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Problems solved by technology

Traditional sandwich RRAM devices such as figure 1 As shown, in order to ensure the electrical performance of RRAM devices, there are certain requirements for the thickness of the bottom electrode-resistive layer-top electrode. The height of via holes in the back stage of advanced process nodes is limited, which poses a great challenge to the uniformity of each layer of RRAM and device performance

Moreover, the etching process of multilayer metal is difficult, and the etching morphology is difficult to control in an ideal situation, and the O in etching 2 The gas will further oxidize the resistive variable layer, and these unfavorable factors limit the manufacture of RRAM devices

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