Memory chip, data processing circuit and data processing method thereof

Abstract

The invention discloses a memory chip, a data processing circuit and a data processing method thereof. The built-in data processing circuit of the memory chip includes a data pattern generator, a parallel-serial conversion circuit and a port driving module. In the test mode, the data pattern generator automatically starts a preset test command, generates test data based on the preset test command, and the test data is converted from parallel to serial by a parallel-to-serial conversion circuit to generate a first data signal, and the first data signal is used to control the port The driving module outputs the first result, and monitors the power consumption parameter of the memory chip based on the first result. There is no need to write data in advance, which shortens the test time; and the test sampling interval is not limited by the upper limit of the maximum address of the data, which reduces the test difficulty and helps to improve the test accuracy.

Description

technical field [0001] The present invention relates to the technical field of memory chips, and more specifically, to a memory chip, a data processing circuit and a data processing method thereof. Background technique [0002] With the continuous development of science and technology, more and more electronic devices are widely used in people's daily life and work, which brings great convenience to people's daily life and work, and has become an indispensable and important tool for people today. tool. Memory chips are an important electronic component of electronic devices. Memory chips require built-in circuitry for power consumption testing. [0003] refer to figure 1 and figure 2 as shown, figure 1 Circuit diagram of the test system when performing power consumption tests for existing memory chips, figure 2 It is a schematic diagram of a built-in circuit for power consumption testing in a memory chip. When performing a power consumption test on a memory chip, it ...

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Problems solved by technology

[0006] From the above description, it can be seen that when the existing memory chip 12 performs power consumption testing, there are many operation steps, and data needs to be written in accordance with the test rules first, which increases the test time and is not convenient for continuous testing. The test process needs to read the data stored in the storage array. , the power consumption test needs to be completed before reaching the maximum read address, which increases the difficulty of the test

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