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Erasing method and system of memory

A memory and erasing voltage technology, which is applied in the memory erasing method and system field, can solve the problems of memory life reduction and achieve the effects of increasing life, ensuring speed, and improving erasing efficiency

Active Publication Date: 2020-02-25
GIGADEVICE SEMICON (BEIJING) INC
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The invention provides a memory erasing method and system to solve the technical problem that the life of the memory is reduced during erasing

Method used

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  • Erasing method and system of memory
  • Erasing method and system of memory

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Experimental program
Comparison scheme
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Embodiment A

[0025] see figure 1 , figure 1 It is a schematic flow chart of a memory erasing method in Embodiment A of the present invention. The memory erasing method is used to improve the durability and ease of use of data read from the memory, so as to improve the life of the memory. The memory erasing method includes the following step:

[0026] Step S1: applying a pulse erase voltage to the memory cell during erasing sequence C1;

[0027] Step S2: Applying a verification voltage to the memory cell when verifying the timing sequence Y1;

[0028] Step S3: If the verification fails, after the erasing sequence C1, apply to the memory cell again vers The pulse erasing voltage is used to verify again, and the pulse width T of the pulsed erasing voltage with increasing amplitude decreases in time sequence.

[0029] see figure 2 , figure 2 is a schematic diagram of the chip structure of the storage unit 111. The storage unit 111 includes a substrate 1111, a source 1112, a drain 1113...

Embodiment B

[0044] see Figure 6 , Figure 6 It is a schematic diagram of the module structure of the memory erasing system 12 of the present invention. The memory erasing system 12 can execute the memory erasing method provided by any embodiment of the present invention. The erasing system 12 of this memory comprises:

[0045] The erasing module 121 is configured to apply a pulse erasing voltage to the memory cell when erasing the sequence C1;

[0046] A verification module 122, configured to apply a verification voltage to the memory cell when verifying the sequence Y1;

[0047] If the verification fails, after the erasing sequence C1, the erasing module 121 again applies vers The verification module 122 performs verification again, and the pulse width T of the pulsed erasing voltage with increasing amplitude decreases in time sequence.

[0048] Through the erasing system 12 of the memory of the present invention, after the verification fails, the erasing module 121 applies the pul...

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Abstract

The invention discloses an erasing method and system of a memory. The erasing method of the memory comprises the following steps of applying pulse erasing voltage to a memory unit when a time sequenceC1 is erased; when the timing sequence Y1 is verified, applying a verification voltage to the memory unit; and if the verification fails, applying the pulse erase voltage with the amplification Dversto the memory unit again after the time sequence C1 is erased so as to perform verification again, and reducing the pulse width T of the pulse erase voltage with the amplification Dvers according tothe time sequence. The erasing method and system of the memory have the advantage of prolonging the service life of the memory.

Description

technical field [0001] The embodiments of the present invention relate to the technical field of memory, and in particular, to a memory erasing method and system. Background technique [0002] Memory is a component that must be used in programming, such as Nand flash memory. Nand flash memory is a kind of non-volatile memory, which has the advantages of fast rewriting speed and large storage capacity. However, when the Nand flash memory is being erased, the verification will fail. After each verification fails, the amplitude of the erasing voltage needs to be increased. In the prior art, every time the erasing fails, the amplitude of the erasing voltage increase and the erasing time are equal. When the erasing voltage is close to the erasing threshold, increasing the erasing voltage again will cause the erasing voltage If the energy provided to the storage unit of the memory is much larger, it will affect the tunnel oxide film of the storage unit and shorten the life of the...

Claims

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Application Information

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IPC IPC(8): G11C16/14
CPCG11C16/14
Inventor 贺元魁潘荣华
Owner GIGADEVICE SEMICON (BEIJING) INC
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