Cache replacement method for configuration information of high-speed reconfigurable processor, and storage architecture
A configuration information, cache replacement technology, applied in the architecture with a single central processing unit, memory system, electrical digital data processing, etc., can solve the problem of not considering the impact of configuration information cache access, etc., to reduce the overall miss rate, improve performance, the effect of reducing the probability of repeated missing
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[0038] In order to make the purpose and technical solution of the present invention clearer and easier to understand. The present invention will be further described in detail below in conjunction with the drawings and embodiments. The specific embodiments described here are only used to explain the present invention, not to limit the present invention.
[0039] In the description of the present invention, it should be understood that the terms "first" and "second" are used for description purposes only, and cannot be interpreted as indicating or implying relative importance or implicitly indicating the quantity of indicated technical features. Thus, a feature defined as "first" and "second" may explicitly or implicitly include one or more of these features. In the description of the present invention, unless otherwise specified, "plurality" means two or more. In the description of the present invention, it should be noted that unless otherwise specified and limited, the term...
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