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Solid-state imaging element and electronic device

An imaging device and solid-state technology, which is applied in the field of solid-state imaging devices and electronic equipment, can solve problems such as reducing the resolution of analog-to-digital conversion units, and achieve the effect of shortening the 1AD time and shortening the reading time

Active Publication Date: 2020-05-01
SONY SEMICON SOLUTIONS CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

In the conventional technique described in Non-Patent Document 1, since the final resolution can be maintained even when the resolution of the AD conversion unit is lowered, the resolution of the AD conversion unit can be lowered

Method used

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  • Solid-state imaging element and electronic device
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  • Solid-state imaging element and electronic device

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0135] Embodiment 1 is an embodiment in which the sample hold unit 15 includes four capacitors for holding pixel signals. In Example 1, similar to Image 6 In the case of the shown circuit configuration, an N-type MOS input source-grounded operational amplifier is used as the inverting amplifier 141 of the column amplifier unit 14, and a single-slope type AD converter is used as the AD converter 161 of the AD conversion unit 16 . For example, the sample hold unit 15 includes a set of a plurality of sample hold circuits 151 provided for each pixel column. Furthermore, the sample hold circuits 151 provided for each pixel column each have four capacitors for holding pixel signals. Figure 8 The configuration of one pixel column of the CMOS image sensor according to the embodiment is illustrated.

[0136] Such as Figure 8 As shown, the sample-and-hold circuit 151 provided for each pixel column includes a total of four capacitors C s_P_odd 、C s_D_odd 、C s_P_even and C s_D_...

Embodiment 2

[0152] Embodiment 2 is a modified example of Embodiment 1, and is an example in which the inverting amplifier 141 includes a P-type MOS input-source-grounded operational amplifier. Figure 10 The configuration of one pixel column of the CMOS image sensor according to Embodiment 2 is illustrated.

[0153] The inverting amplifier 141 of the column amplifier unit 14 can take various forms. In Embodiment 1, an N-type MOS input source grounded operational amplifier is used as the inverting amplifier 141 . On the other hand, in Embodiment 2, a P-type MOS input source-grounded operational amplifier is used as the inverting amplifier 141 . In this way, even in the case of using a P-type MOS input-source grounded operational amplifier as the inverting amplifier 141, the same operation and effect as Embodiment 1 using an N-type MOS input-source grounded operational amplifier can be obtained.

Embodiment 3

[0155] Embodiment 3 is a modified example of Embodiment 1, and is an example in which the input of the inverting amplifier 141 is used as the input of the level determination circuit 142 . Figure 11 The configuration of one pixel column of the CMOS image sensor according to Embodiment 3 is illustrated.

[0156] In Embodiment 1, the output of the inverting amplifier 141 (ie, the output of the column amplifier unit 14 ) is used as the input of the level determination circuit 142 . On the other hand, in Embodiment 3, the input of the inverting amplifier 141 (ie, the input of the column amplifier unit 14 ) is used as the input of the level determination circuit 142 . In this way, even in the case where the input of the inverting amplifier 141 is used as the input of the level determination circuit 142, the same operations and effects as in Embodiment 1 can be obtained. The technique of Embodiment 3 can also be applied to Embodiment 2.

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Abstract

A solid-state imaging element is provided with a pixel array unit in which a plurality of unit pixels including a photoelectric conversion unit are arranged in a matrix; an amplifier unit which adjusts the levels of pixel signals outputted from the unit pixels through vertical signal lines provided to correspond to a column array of the pixel array unit; a sampling & holding unit which samples andholds a pixel signal passing through the amplifier unit; and an analog-digital conversion unit which converts a pixel signal outputted from the sampling & holding unit to a digital signal. The sampling & holding unit has at least three capacitances each for holding the pixel signal and concurrently performs the incorporation of the pixel signal into one capacitance, and the output of the pixel signal previously incorporated into another capacitance to the analog-digital conversion unit.

Description

technical field [0001] The present disclosure relates to a solid-state imaging device and electronic equipment. Background technique [0002] In a solid-state imaging device, for example, a single-slope type AD converter can be used as an AD converter of an AD conversion unit that converts an analog pixel signal output by a unit pixel into a digital signal. In the single-slope type AD converter, when one time of pixel signal reading and AD conversion time is set as 1AD time, most of the 1AD time consists of the settling time (settling time) of the input signal from the unit pixel and The counting time of the counter of the analog-to-digital converter takes up. [0003] Conventionally, a column amplifier unit with adaptive gain control or automatic gain control (AGC: Automatic Gain Control) function is arranged at the front end of the analog-to-digital conversion unit to shorten the 1AD time (see, for example, Non-Patent Document 1). In the conventional technique described ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N5/378H04N5/374
CPCH01L27/14634H04N25/79H04N25/76H04N25/78H01L27/14603H01L27/14609H04N25/75
Inventor 马上崇植野洋介山下知宪长谷部一徳
Owner SONY SEMICON SOLUTIONS CORP