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Instruction set static disassembling method based on characteristics of DSP processor

A processor and disassembly technology, applied in the field of hardware security, to achieve the effect of ensuring efficiency and accuracy, and improving correctness

Active Publication Date: 2020-07-10
UNIV OF ELECTRONICS SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The purpose of the present invention is in order to solve the problem of DSP processor disassembly algorithm, has proposed a kind of instruction set static disassembly method based on DSP processor characteristic

Method used

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  • Instruction set static disassembling method based on characteristics of DSP processor
  • Instruction set static disassembling method based on characteristics of DSP processor
  • Instruction set static disassembling method based on characteristics of DSP processor

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Embodiment Construction

[0050] Embodiments of the present invention will be further described below in conjunction with the accompanying drawings.

[0051] Such as figure 1 As shown, the present invention provides a kind of instruction set static disassembly method based on DSP processor characteristics, comprises the following steps:

[0052] S1: Establish a data file format analysis library and a binary mapping assembly database;

[0053] S2: Based on the data file format analysis library and the binary mapping assembly database, read the binary data stored in the non-volatile memory outside the DSP processor chip to obtain the original binary data;

[0054] S3: According to the data file format analysis library, the original binary data is processed to obtain the binary code data belonging to the program segment;

[0055] S4: assemble the database according to the binary mapping, and disassemble the binary code data by using the static disassembly method to obtain the corresponding assembly inst...

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Abstract

The invention discloses an instruction set static disassembling method based on DSP processor characteristics. The instruction set static disassembling method comprises the following steps: S1, establishing a data file format analysis library and a binary mapping assembling database; S2, reading binary data to obtain original binary data; S3, processing the original binary data according to the data file format analysis library to obtain binary code data belonging to the program segment; S4, disassembling the binary code data by adopting a static disassembling method to obtain a correspondingassembling instruction; S5, adding branch identifiers to the assembly instructions, and completing the static disassembly of the DSP. According to the method, binary codes running on a DSP processor platform are disassembled, and assembly-level codes are obtained. In order to adapt to the characteristics of the DSP, the disassembling process is improved and adapted; meanwhile, in order to improvethe correctness of disassembling, assembling detection is added, so the disassembling efficiency and accuracy are ensured.

Description

technical field [0001] The invention belongs to the technical field of hardware safety, and in particular relates to a static disassembly method of an instruction set based on the characteristics of a DSP processor. Background technique [0002] Disassembly technology plays an important role in the current security field. The current disassembly algorithm includes a linear scan disassembly algorithm and a marching recursive disassembly algorithm. [0003] The linear scanning algorithm first sets the analysis start address and analysis end address according to the code entry point and the size of the code segment, and then disassembles from the set analysis start address, and then analyzes the code segment according to the restrictions on the start position and end address. scan all content. The linear scanning algorithm does not use control flow information to guide the progress of the disassembly engine during the scanning process, and disassembles each instruction encoun...

Claims

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Application Information

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IPC IPC(8): G06F8/53
CPCG06F8/53
Inventor 王坚陈哲李玉柏李桓郭世泽
Owner UNIV OF ELECTRONICS SCI & TECH OF CHINA
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