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A grid topology analysis method based on gpu layered acceleration

An analysis method and power grid topology technology, applied in circuit devices, electrical components, information technology support systems, etc., can solve the problems of reduced parallelism, performance loss, rough reproduction, etc., to achieve high parallelism, time-consuming, The effect of improving parallelism

Active Publication Date: 2021-08-10
SOUTHEAST UNIV
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Problems solved by technology

However, these algorithms are basically rough reproductions of traditional algorithms under parallel programs, and fail to take into account the unique properties that can be utilized in power grid topology analysis calculations. As a result, in the last few iterations of the analysis, only a few threads are left running, and the degree of parallelism down to a very low level, which undoubtedly results in a loss of performance

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  • A grid topology analysis method based on gpu layered acceleration
  • A grid topology analysis method based on gpu layered acceleration
  • A grid topology analysis method based on gpu layered acceleration

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Embodiment

[0094] The actual grid is tested by using the profile file of the smart grid dispatching system. The test grid model is a network adjustment level grid with a voltage range of 1kV to 500kV, including 11,293 lines, 347 units, 43,040 loads, 6,341 transformers, 10,509 parallel compensators, 3 series compensators, and 94,711 circuit breakers And 168584 knife gates. After topology analysis, there are 10,849 computing nodes, 9,384 computing nodes on the main island, and 118,447 physical nodes.

[0095] The hardware and software configuration of the test platform is as follows:

[0096] serial number name Version 1 Windows operating system Windows 10 Professional (64-bit) 2 CUDA CUDA 10.1 3 CPU Intel i9-9900K 4 GPU NVIDIA TITAN RTX

[0097] The test results are as follows:

[0098]

[0099] The analysis method of the present invention utilizes the characteristics of the grid model to propose a grid topology analysis method based...

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Abstract

The invention discloses a network topology analysis method based on GPU layered acceleration, which includes the following steps: reading in the actual grid section file in the CPU, extracting the grid model as a grid physical model, compiling an undirected graph, and performing topology analysis The required information is compressed and stored and transmitted to the GPU; the parallel topology analysis kernel function StationBus_kernel of the branch station is called in the GPU, and d_Visited is generated and passed to h_Visited; the division results of the computing nodes of the entire network are sorted into computing nodes, and the adjacency list of computing nodes is compiled to form the entire network Calculate the adjacency array of nodes and store and transmit in a compressed form; call the system topology analysis function System_Kernel_new in the GPU to form the topology analysis result. The invention uses a GPU with high parallel potential to perform topology analysis of a large-scale power grid, thereby improving the real-time performance and stability of the topology analysis of the power grid.

Description

technical field [0001] The invention relates to a power grid topology analysis method, in particular to a power grid topology analysis method based on GPU layered acceleration. Background technique [0002] Power grid topology analysis is the process of analyzing the state of components used for conversion, protection and control in the process of electric energy flow, and then obtaining the grid structure relationship. The purpose of power grid topology analysis is to use the analyzed power grid structure for many power grid analysis operations at the application layer, including power flow calculation and power grid state estimation. Therefore, topology analysis constitutes the basic module of power grid analysis and calculation, and its performance directly affects the performance of the application layer of many power grid analysis algorithms. The high-performance power grid topology analysis algorithm is a key component of the real-time power grid analysis series algor...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H02J13/00
CPCY04S10/40
Inventor 周赣王子恒郑逸凡赵嘉豪华济民傅萌冯燕钧
Owner SOUTHEAST UNIV