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Triple modular redundancy computer clock synchronization method and system thereof

A technology of clock synchronization and three-mode redundancy, which is applied in the computer field, can solve problems such as low synchronization accuracy, low synchronization accuracy, and three machines cannot be synchronized, achieve high compensation accuracy, realize full component redundancy, and solve synchronization reliability Reduced effect

Active Publication Date: 2020-08-14
北京中科宇航技术有限公司
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AI Technical Summary

Problems solved by technology

[0007] (1) The synchronization accuracy depends on the unified synchronous heartbeat of the three machines after the interactive voting. Because the synchronous heartbeat generates interactive voting, it takes time to complete. The clock cycle of the synchronous heartbeat is difficult to achieve the same magnitude as the working clock of the CPU sub-module, and the synchronization accuracy is not high. , under normal circumstances, the synchronization accuracy of this scheme is several orders of magnitude lower than that of the common clock scheme
[0008] (2) The synchronous logic circuit also needs to be driven by the clock, and there is also clock asynchrony. When the driving clock of the synchronous logic circuit of the three machines deviates greatly initially or during operation, it may cause a fault that the three machines cannot be synchronized

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  • Triple modular redundancy computer clock synchronization method and system thereof
  • Triple modular redundancy computer clock synchronization method and system thereof

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Embodiment Construction

[0028] The following describes the technical solutions in the embodiments of the present invention clearly and completely with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by those skilled in the art without creative work shall fall within the protection scope of the present invention.

[0029] This application provides a three-mode redundant computer clock synchronization method and system, which can directly compensate and debug the clock output value through clock count value feedback, with high compensation accuracy, and internal use of a redundant structure to realize the internal clock synchronization system No single point of failure link, high reliability technical effect.

[0030] Such as figure 1 As shown, this application provides a th...

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Abstract

The invention discloses a triple modular redundancy computer clock synchronization method and a system thereof. The triple modular redundancy computer clock synchronization system comprises three CPUsub-modules and a dual-redundancy MCU clock configuration unit; every two of the three CPU sub-modules are connected through a three-computer data exchange / synchronization / voting channel; the dual-redundancy MCU clock configuration unit is respectively connected to the three CPU sub-modules through clock feedback channels; the dual-redundancy MCU clock configuration unit is further connected to the three CPU sub-modules through an I2C bus. The method and system provided by the invention have the technical effects that the clock output value is directly compensated and debugged through clock count value feedback, the compensation precision is high, a redundant structure is adopted internally, and no single-point failure link exists in the clock synchronization system and the reliability ishigh.

Description

Technical field [0001] This application relates to the field of computer technology, in particular to a three-mode redundant computer clock synchronization method and system. Background technique [0002] The three-mode redundant computing technology is a highly reliable and fault-tolerant computing technology, that is, three completely independent computer (central processing unit, CPU) sub-modules perform the same calculation and operation on an input object at the same time, and the processing result At the same time, it is sent to the output voter, and the voter uses the calculation result of the same majority of the CPU sub-modules as the voting output, which is usually called three out of two voting output. This technology can effectively eliminate single-point failures and achieve computer system-level fault tolerance. Its application fields are aviation, aerospace and industrial control fields that require high reliability and safety. In order to ensure the correct and ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F1/12G06F11/14
CPCG06F1/12G06F11/1456
Inventor 王明明朱永泉王志辛哲奎杨毅强
Owner 北京中科宇航技术有限公司
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