Digital phase locked loop circuit and method therefor

Abstract

A digital PLL circuit having an impulse noise remover for removing an impulse noise component from an external reference clock signal and for outputting an internal reference clock signal having had noise removed therefrom. The acquisitor and the phase detector receive the internal reference signal. The acquisitor generates a reset signal according to the external reference clock signal and according to an act mode signal for synchronizing with an external system. A phase detector, which is reset by the reset signal, is operative for comparing the phase of the external reference clock signal with that of a clock signal self-divided at the same frequency as the external reference clock signal. The phase detector generates a phase detection signal. A frequency synthesizer generates a corrected clock signal, by changing the division ratio of a system clock signal according to the phase detection signal and an act clock signal, to generate a locked final output.

Description

technical field [0001] The invention relates to the field of digital communication, in particular to a digital phase-locked loop (PLL) circuit and a digital PLL method with short initial synchronization time. Background technique [0002] In order to connect two different networks, one network must be synchronized with the other network. For example, when two different channels such as a basic channel commonly used in a private switching system are interconnected with an Integrated Services Digital Network (ISDN) as another network, since there is a difference between the system clock signals used by each channel, These channels cannot be synchronized with each other, so data is lost during communication. Contents of the invention [0003] In order to solve the above-mentioned problems, an object of the present invention is to provide a digital PLL circuit for maintaining two stable systems by correcting a clock signal of one system to be synchronized with a reference clo...

AI Technical Summary

Problems solved by technology

For example, when two different channels such as a basic channel commonly used in a private switching system are interconnected with an Integrated Services Digital Network (ISDN) as another network, since there is a difference between the system clock signals used by each channel, These channels cannot be synchronized with each other, so data is lost during communication

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