Hardware implementation method for generating B1C signal pseudorandom noise code

A pseudo-random noise code, hardware implementation technology, applied in satellite radio beacon positioning systems, measuring devices, instruments, etc., can solve the problems of large amount of calculation, many hardware resources, etc., to improve the output speed, simplify the circuit structure, save energy The effect of hardware resources

Pending Publication Date: 2020-09-22
HARBIN ENG UNIV
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Problems solved by technology

[0004] The purpose of the present invention is to solve the problem of too many hardware resources and a large amount of calculation when generati...

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  • Hardware implementation method for generating B1C signal pseudorandom noise code
  • Hardware implementation method for generating B1C signal pseudorandom noise code
  • Hardware implementation method for generating B1C signal pseudorandom noise code

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specific Embodiment approach

[0038] (1) In order to save the memory space when multi-channel B1C pseudo-code output, a hardware circuit based on B1C pseudo-random noise code output shared by block ROM is designed.

[0039] (2) In order to improve the computation and output speed of Legendre sequence, a block memory-based sequence output method is designed.

[0040] (3) Using timing logic and algorithm, a multi-channel time-division multiplexing scheme of block memory in FPGA is proposed to realize the multi-channel output method of sequence.

[0041] Embodiments of the invention are described below:

[0042] Describe the multi-channel output embodiment of the B1C signal pseudocode sequence of the present invention. Generate a .coe format file storing 10243 Legendre sequences through MATLAB, load it into the Block Memory IP core in the VIVADO integrated development environment, and set it as the ROM memory of the dual-channel output port, and set the number of channels M to 25. Sampling clock frequency f...

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Abstract

The invention provides a hardware implementation method for generating a B1C signal pseudorandom noise code, which is characterized by comprising the following steps of: 1, designing a Legendre hardware output implementation method based on a block memory; 2, designing a hardware circuit scheme based on block ROM shared B1C pseudo-random noise code output; and 3, proposing a scheme of multi-channel time division multiplexing of the block memory in the FPGA, and realizing a multi-channel output method of the sequence. The invention aims to solve the problem that a multichannel B1C signal pseudocode generator occupies too many hardware resources, a multichannel B1C pseudo-random noise code output hardware design based on an FPGA and a time division multiplexing algorithm is provided. A specific design scheme and a simulation result are given, multichannel output of the B1C signal pseudo-random noise code of the low-power Beidou navigation receiver is realized, and the problems that thegenerated pseudo code sequence occupies too much hardware resources and the circuit structure is complex are solved.

Description

technical field [0001] The present invention relates to a hardware implementation method of a pseudo-random noise code, in particular to a hardware implementation method of generating a B1C signal pseudo-random noise code. Background technique [0002] The global satellite navigation system can complete the work of positioning, navigation and timing. With the continuous improvement and development of the global satellite navigation system, people have higher and higher requirements for the positioning and navigation performance and power consumption of the navigation receiver. The application of Beidou navigation receiver will become more and more extensive. For the Beidou B1C navigation signal of code division multiple access, the ranging code is an indispensable part, which is used to distinguish different Beidou satellites and complete the ranging positioning. In satellite navigation receivers, pseudocode generators are used for both signal acquisition and tracking. Des...

Claims

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Application Information

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IPC IPC(8): G01S19/37
CPCG01S19/37
Inventor 丁继成张永超杜朝明李亮程建华黄卫权王坤柏亚国
Owner HARBIN ENG UNIV
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