Three-dimensional memory and manufacturing method thereof

Abstract

The embodiment of the invention discloses a three-dimensional memory and a manufacturing method thereof, and the method comprises the steps: providing a semiconductor structure which comprises a semiconductor substrate, a sacrificial layer located on the semiconductor substrate, a laminated structure located on the sacrificial layer, and a channel hole passing through the laminated structure and the sacrificial layer, wherein a channel layer is formed in the channel hole, and the channel layer is provided with a part corresponding to the sacrificial layer in the direction parallel to the semiconductor substrate; forming a gate line groove which penetrates through the laminated structure and reaches the sacrificial layer; removing the sacrificial layer through the gate line groove to exposethe side wall of the part of the channel layer and the upper surface of the semiconductor substrate; and forming a germanium-silicon epitaxial layer on the exposed side wall of the channel layer andthe upper surface of the semiconductor substrate through a selective epitaxial growth process.

Description

technical field [0001] The embodiments of the present application relate to the field of semiconductor manufacturing, and in particular to a three-dimensional memory and a manufacturing method thereof. Background technique [0002] With the continuous development of semiconductor technology, the current memory manufacturing technology has gradually transitioned from a simple planar structure to a more complex three-dimensional structure, and the integration density is increased by three-dimensionally arranging memory cells on the substrate. The technical research and development of this three-dimensional memory device is one of the mainstreams of international research and development. [0003] In the process of a three-dimensional memory device, in order to realize the electrical connection between the channel and the gate line groove (ie, the common source channel), a silicon epitaxial layer is grown laterally on the sidewall of the channel layer. However, in the conventi...

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Problems solved by technology

However, in the conventional process, it is difficult to control the growth thickness of the silicon epitaxial layer during the formation of the silicon epitaxial layer, thus affecting the uniformity of the grown silicon epitaxial layer

Moreover, the carrier mobility of the silicon epitaxial layer is small, which is difficult to meet the needs of the growing three-dimensional memory devices.

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