A kind of three-dimensional memory and its manufacturing method

A manufacturing method and memory technology, applied in semiconductor devices, electrical solid state devices, electrical components, etc., can solve problems such as difficulty in controlling the growth thickness of silicon epitaxial layers, difficulty in meeting the requirements of three-dimensional memory devices, and small carrier mobility

Active Publication Date: 2021-04-27
YANGTZE MEMORY TECH CO LTD
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  • Summary
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  • Claims
  • Application Information

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Problems solved by technology

However, in the conventional process, it is difficult to control the growth thickness of the silicon epitaxial layer during the formation of the silicon epitaxial layer, thus affecting the uniformity of the grown silicon epitaxial layer
Moreover, the carrier mobility of the silicon epitaxial layer is small, which is difficult to meet the needs of the growing three-dimensional memory devices.

Method used

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  • A kind of three-dimensional memory and its manufacturing method
  • A kind of three-dimensional memory and its manufacturing method
  • A kind of three-dimensional memory and its manufacturing method

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Embodiment Construction

[0042] Exemplary embodiments disclosed in the present application will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present application are shown in the drawings, it should be understood that the present application may be embodied in various forms and should not be limited to the specific embodiments set forth herein. Rather, these embodiments are provided for a more thorough understanding of the present application and for fully conveying the scope disclosed in the present application to those skilled in the art.

[0043] In the following description, numerous specific details are given in order to provide a more thorough understanding of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced without one or more of these details. In other examples, in order to avoid confusion with the present application, some technical features kno...

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Abstract

The embodiment of the present application discloses a three-dimensional memory and a manufacturing method thereof. The method includes: providing a semiconductor structure, the semiconductor structure including a semiconductor substrate, a sacrificial layer on the semiconductor substrate, and a sacrificial layer on the sacrificial layer. A stacked structure and a channel hole penetrating through the stacked structure and the sacrificial layer; a channel layer is formed in the channel hole, and the channel layer has a direction parallel to the semiconductor substrate and The part corresponding to the sacrificial layer; forming a gate line groove through the laminated structure to reach the sacrificial layer; removing the sacrificial layer through the gate line groove, exposing the channel layer part of the sidewall and the upper surface of the semiconductor substrate; forming a silicon germanium epitaxial layer on the exposed sidewall of the channel layer and the upper surface of the semiconductor substrate by a selective epitaxial growth process .

Description

technical field [0001] The embodiments of the present application relate to the field of semiconductor manufacturing, and in particular to a three-dimensional memory and a manufacturing method thereof. Background technique [0002] With the continuous development of semiconductor technology, the current memory manufacturing technology has gradually transitioned from a simple planar structure to a more complex three-dimensional structure, and the integration density is increased by three-dimensionally arranging memory cells on the substrate. The technical research and development of this three-dimensional memory device is one of the mainstreams of international research and development. [0003] In the process of a three-dimensional memory device, in order to realize the electrical connection between the channel and the gate line groove (ie, the common source channel), a silicon epitaxial layer is grown laterally on the sidewall of the channel layer. However, in the conventi...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H01L27/11568H01L27/11582
CPCH10B43/30H10B43/27
Inventor 郭海峰张豪艾义明
Owner YANGTZE MEMORY TECH CO LTD
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