Method for eliminating current overshoot and switching circuit

A switching circuit and current technology, applied in the method and switching circuit to eliminate the current overshoot field, can solve the problems of system reliability damage, current overshoot, etc., so as to reduce the output current overshoot phenomenon, reduce the damage, and eliminate the current overshoot. Effect

Pending Publication Date: 2020-10-16
MAXIC TECHNOLOGY CORPORATION
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a method and a switch circuit for eliminating current overshoot, aiming at solving the problem that current overshoot is easily caused when the existing switching power supply system is powered on again during the power-off process, causing damage to the reliability of the system technical issues

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  • Method for eliminating current overshoot and switching circuit
  • Method for eliminating current overshoot and switching circuit
  • Method for eliminating current overshoot and switching circuit

Examples

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Effect test

Embodiment 1

[0047] Such as Figure 5 , a method for eliminating current overshoot provided by the present invention comprises the following steps:

[0048] Determine whether the system enters the power-down state;

[0049] When the system enters the power-off state, the power-off protection device is activated, and the power-off timer starts to record the power-off time;

[0050] When the power-off time reaches a preset time, the integrator stops integrating, wherein the preset time is longer than the cycle time of the bus voltage VM.

[0051]Due to the power-off, the bus voltage drops, which makes the voltage of the sampling resistor drop, which in turn causes V ref and V fb As the difference increases, the integrator produces an error signal V comp will increase, causing the driver to generate a PWM signal that exceeds the steady-state value, and the output current I L Increasing the current beyond the steady state creates an overshoot.

[0052] Therefore, in this embodiment, the ...

Embodiment 2

[0059] Such as Figure 7 As shown, a method for eliminating current overshoot includes the following steps:

[0060] Get bus voltage parameters, when the bus voltage is less than the power-off threshold voltage, and the bus voltage continues to drop (such as Figure 6 As shown), at this time, it is determined that the system has entered a power-off state.

[0061] Start the power-down protection device, and the power-down timer starts to record the power-down time;

[0062] When the power-off time reaches a preset time, the integrator stops integrating, wherein the preset time is longer than the cycle time of the bus voltage VM.

[0063] Due to the power-off, the bus voltage drops, which makes the voltage of the sampling resistor drop, which in turn causes V ref and V fb As the difference increases, the integrator produces an error signal V comp will increase, causing the driver to generate a PWM signal that exceeds the steady-state value, and the output current I L Incr...

Embodiment 3

[0068] Such as Figure 8 As shown, a method for eliminating current overshoot includes the following steps:

[0069] Obtain the electrical parameter of the sampling resistor. When the electrical parameter of the sampling resistor is less than the threshold and continues to drop, it is determined that the system has entered a power-off state. The electrical parameters of the sampling resistor include current or voltage of the sampling resistor.

[0070] Start the power-down protection device, and the power-down timer starts to record the power-down time;

[0071] When the power-off time reaches a preset time, the integrator stops integrating, wherein the preset time is longer than the cycle time of the bus voltage VM.

[0072] Due to the power-off, the bus voltage drops, which makes the voltage of the sampling resistor drop, which in turn causes V ref and V fb As the difference increases, the integrator produces an error signal V comp will increase, causing the driver to g...

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Abstract

The invention provides a method for eliminating current overshoot and a switching circuit, belongs to the field of switching power supplies, and comprises the following steps: judging whether a systementers a power-down state or not; if the system enters the power-down state, starting a power-down protection device; and when the power-down time reaches the preset time and the preset time is greater than the period time of the bus voltage VM, enabling the integrator to stop integration. According to the method for eliminating the current overshoot provided by the invention, after the system ispowered down, the longest integration of the integrator is stopped, i.e., the upward integration is stopped. Therefore, the rise of the error signal Vcomp is limited, and the current overshoot is limited after the circuit is powered on again, so that the phenomenon of output current overshoot can be greatly reduced.

Description

technical field [0001] The invention belongs to the field of switching power supplies, and more specifically relates to a method for eliminating current overshoot and a switching circuit. Background technique [0002] In the design and implementation of switching power supply circuits, the integral loop is a common circuit. refer to figure 1 , after the mains passes through the rectifier bridge, it outputs a DC signal VM (bus voltage) to provide energy for the switching power supply. A switching power supply consists of an error amplifier (EA), a driver, a switching network, a feedback circuit, etc. The feedback circuit samples the output voltage or current and other electrical parameters to obtain a feedback signal V fb , and then fed back to an input of the error amplifier (such as the inverting input), and the set reference potential V ref Compare and amplify, and output an error signal V at the output of EA comp . When the feedback signal V fb below V ref , the e...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H03K17/08H02M1/32
CPCH02M1/32H03K17/08
Inventor 闫志光刘柳胜
Owner MAXIC TECHNOLOGY CORPORATION
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