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Defect detection, classification, and process window control using scanning electron microscope metrology

The processor receives the semiconductor wafer image, and combines the machine learning algorithm and critical size uniformity parameters to solve the problem of defect detection and classification in the existing technology, achieve efficient classification and training of semiconductor wafer defects, and improve the quality of manufacturing. Rate.

Active Publication Date: 2020-10-27
KLA CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

In an additional instance, currently used methods for performing data augmentation cannot be used to directly improve or correct poorly trained classifiers

Method used

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Embodiment Construction

[0035] While claimed subject matter will be described in terms of particular embodiments, other embodiments, including embodiments that do not provide all of the benefits and features set forth herein, are also within the scope of the disclosure. Various structural, logical, process step and electrical changes may be made without departing from the scope of the present invention. Accordingly, the scope of the present invention is defined only with reference to the appended claims.

[0036] The output of critical dimension uniformity (CDU) features on SEM re-inspection or inspection platforms can be integrated into defect classification exercises. Metrological features such as CDU measure pattern fidelity metrics such as pattern width, length, diameter, area, angle, roughness, edge placement error, etc. The automated defect classification platform can automatically classify defects based on specific defect attributes or can use a neural network that has been trained to recogni...

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Abstract

A defect in an image of a semiconductor wafer can be classified as an initial defect type based on the pixels in the image. Critical dimension uniformity parameters associated with the defect type canbe retrieved from an electronic data storage unit. A level of defectivity of the defect can be quantified based on the critical dimension uniformity parameters. Defects also can be classified based on critical dimension attributes, topography attributes, or contrast attributes to determine a final defect type.

Description

[0001] Cross References to Related Applications [0002] This application claims an Indian Patent Application filed on March 14, 2018 and assigned Application No. 201841009298 and a Provisional Patent filed on May 2, 2018 and assigned US Application No. 62 / 665,903 priority to the application, the disclosure of which is incorporated herein by reference. technical field [0003] The present invention relates to defect detection and classification on semiconductor wafers. Background technique [0004] The evolution of the semiconductor manufacturing industry places ever higher demands on yield management and, in particular, on metrology and inspection systems. The critical dimension continues to shrink. The economy is driving the industry to reduce the time it takes to achieve high yield, high value products. Minimizing the total time from detection of yield problems to resolution determines the return on investment for semiconductor manufacturers. [0005] Fabrication of ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/66G01N21/88G01N21/95G06V10/764
CPCG06T2207/30148G06T7/0006G06T7/001G06T2207/10061G06T2207/20081G06N3/08G06T2207/20084G06V2201/06G06V10/82G06V10/764G06N3/045G06F18/2413G06N3/0475G06N3/09G06N3/0464G01N21/8851G01N21/9501H10P74/23H10P74/203G06T2207/20224G06N20/00G06F18/24
Owner KLA CORP