A nano-wafer punching method without loss inductance
A nanocrystalline and inductance-consuming technology, which is applied to circuits, electrical components, and fine working devices, can solve problems such as high defect rate, high cost, and reduce nanocrystalline inductance, so as to avoid magnetic fragmentation and excessive tension , cost reduction effect
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[0030] The embodiments of the present invention are described in detail below, so that the advantages and features of the present invention can be more easily understood by those skilled in the art, so as to define the protection scope of the present invention more clearly.
[0031] Such as figure 2 As shown, a nano-wafer knife stamping method without loss inductance is stamped by a nano-wafer knife stamping device. The nano-wafer knife stamping device includes fourteen finale shafts arranged in parallel along the feeding direction, including The first finale, the second finale, the third finale, the fourth finale, the fifth finale, the sixth finale, the seventh finale, the eighth finale, the ninth finale, the tenth finale, the eleventh finale, the twelfth finale and The thirteenth finale, the bottom shaft of the fourth finale and the upper shaft of the seventh finale lower the shaft surface, and are not in contact with other shaft surfaces and strips;
[0032] The feeding m...
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