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Circuit test method and device based on hidden Markov model, and storage medium

A Hidden Markov, circuit testing technology, applied in the direction of measuring devices, measuring electricity, measuring electrical variables, etc., can solve the problems of damage to the chip, reduce the reliability of the test, do not consider the power consumption and temperature of the test vector, and reduce the risk. , Reduce the risk of damage to the chip, the effect of less flipping

Active Publication Date: 2020-12-15
ANQING NORMAL UNIV
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0006] The technical problem to be solved by the present invention is that the circuit testing method based on the hidden Markov model in the prior art does not consider the power consumption and temperature that may be generated by the test vector during the test, which easily leads to damage to the chip and reduces the reliability of the test.

Method used

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  • Circuit test method and device based on hidden Markov model, and storage medium

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0041] At present, the main process for integrated circuit testing in the electronics industry is:

[0042] 1. According to the circuit diagram of the integrated circuit, a test vector for this circuit is generated by an automatic test pattern generation tool (Automatic Test Pattern Generation, ATPG). This process is to improve the fault coverage rate of the test as much as possible and reduce the number of undetectable faults.

[0043] 2. After obtaining the test vector, input the test vector into the automatic test equipment ATE, and test each chip to be tested. If either fault is detected, there is a problem with the chip and it cannot be used. If the test ends without failure, it means that the chip has no failure and can be put into use.

[0044] For the above two main processes, the first step test vector generation algorithm is not the research focus of the present invention. For the second step, in order to shorten the test time, power consumption and test cost. It...

Embodiment 2

[0060] Corresponding to Embodiment 1 of the present invention, Embodiment 2 of the present invention also provides an integrated circuit storage medium, which stores a computer program used in conjunction with an automatic test vector generation tool, and the computer program can be executed by a processor to complete the implementation The method described in Example 1.

Embodiment 3

[0062] Corresponding to Embodiment 1 of the present invention, Embodiment 3 of the present invention also provides a circuit testing device based on a hidden Markov model, and the device includes:

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Abstract

The invention discloses a circuit test method and device based on a hidden Markov model, and a storage medium. The circuit test method comprises the steps of: randomly generating a test vector set fora circuit according to an imported circuit structure diagram by an automatic test vector generation tool; according to the randomly generated test vector set, carrying out a circuit test and judgingwhether the temperature of the circuit is too high based on the hidden Markov model; if the temperature of the circuit is not too high, directly inputting the test vector set into automatic test equipment ATE to carry out circuit test; and if the temperature of the circuit is too high, reordering the test vector set to reduce overturning between the test vectors to obtain an updated test vector set, inputting the updated test vector set into the automatic test equipment ATE, and performing circuit test. The circuit test method has the advantages that the test temperature is effectively controlled, the risk of damaging the chip is reduced, and the test reliability is improved.

Description

technical field [0001] The invention relates to the technical field of integrated circuit testing, and more specifically relates to a circuit testing method, storage medium and device based on a hidden Markov model. Background technique [0002] With the continuous improvement of integrated circuit manufacturing technology and the rapid increase of circuit integration, the number of transistors integrated on a single chip is increasing exponentially, and the corresponding test data volume will be even larger. Automatic test equipment (Automatic Test Equipment, ATE) is used to detect the integrity of integrated circuit functions, and is the final process of integrated circuit manufacturing to ensure the quality of integrated circuit manufacturing. As the complexity of circuit structures increases, chip manufacturers spend more and more on chip testing. For this reason, reducing the cost of testing has become an important task. [0003] The cost of automated test equipment A...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G01R31/3183G01R31/3185
CPCG01R31/318307G01R31/318544Y02D10/00
Inventor 詹文法华铭江健生蔡雪原冯学军彭登辉
Owner ANQING NORMAL UNIV