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Task scheduling method and device, equipment and medium

A task scheduling and task technology, applied in the field of multi-core computers, can solve the problems of reduced computer system data processing efficiency, subtask blocking, and reduced computer system performance.

Active Publication Date: 2020-12-25
山东云海国创云计算装备产业创新中心有限公司
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  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, in this allocation mode, the operating system scheduling module only schedules subtasks mechanically, which will lead to frequent access between subtasks running inside different CPUs when subtasks with a high degree of coupling are allocated to different CPUs. The memory operation leads to the blocking problem of subtasks, which leads to low task execution efficiency, which in turn reduces the data processing efficiency of the entire computer system and reduces the performance of the computer system.

Method used

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  • Task scheduling method and device, equipment and medium
  • Task scheduling method and device, equipment and medium
  • Task scheduling method and device, equipment and medium

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Embodiment Construction

[0051] The following will clearly and completely describe the technical solutions in the embodiments of the application with reference to the drawings in the embodiments of the application. Apparently, the described embodiments are only some of the embodiments of the application, not all of them. Based on the embodiments in this application, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the scope of protection of this application.

[0052] see image 3 As shown, the embodiment of the present application discloses a task scheduling method, which is applied to a multi-core computer, and the method includes:

[0053]Step S11: Obtain a task to be executed, and divide the task to be executed into a plurality of subtasks to be executed in parallel.

[0054] In a specific implementation process, it is necessary to obtain the task to be executed first, and divide the task to be executed into multiple subtasks to be ex...

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Abstract

The invention discloses a task scheduling method and device, equipment and a medium, and the method comprises the steps: obtaining a to-be-executed task, and dividing the to-be-executed task into a plurality of to-be-executed subtasks which are executed in parallel; determining the number of shared variables among the to-be-executed sub-tasks; grouping the to-be-executed sub-tasks based on the number of the shared variables to obtain different to-be-executed task groups; and allocating each to-be-executed task group to a corresponding CPU, and allocating a storage space to a variable in the to-be-executed task, so that the CPU executes a to-be-executed sub-task in the allocated to-be-executed task group. In this way, the subtasks with the high coupling degree can be distributed to the sameCPU, the subtask blocking problem is avoided, the task execution efficiency is improved, and then the data processing efficiency and performance of the whole computer system are improved.

Description

technical field [0001] The present application relates to the technical field of multi-core computers, and in particular to a task scheduling method, device, equipment, and medium. Background technique [0002] The multi-core processor is the current mainstream commercial CPU (Central Processing Unit, central processing unit) architecture. The multi-core processor adopts the method of integrating multiple processor cores into one chip, and all processor cores can access all physical memory , easy to manage, so it has been widely used. Multi-core programming often adopts multi-task mode design, and tasks are assigned to each processor core for execution in parallel. A typical programming model is a shared memory programming model. [0003] see figure 1 As shown, in the UMA (Unified Memory Architecture, Unified Memory Architecture) architecture, each CPU implements consistent storage, and each CPU can access memory through a memory controller. see instead figure 2 As show...

Claims

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Application Information

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IPC IPC(8): G06F9/48G06F9/50
CPCG06F9/4881G06F9/5027G06F9/5066
Inventor 刘同强王朝辉李拓周玉龙邹晓峰童元满
Owner 山东云海国创云计算装备产业创新中心有限公司
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