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A method and device for accurately analyzing dynamic power consumption

A technology of dynamic power consumption and analysis method, which is applied in computing, computer-aided design, special data processing applications, etc. It can solve problems such as high requirements for CPU type selection, low accuracy, and long time consumption, and achieve accurate peak recording Effects of Power Consumption, Accurate Acquisition and Analysis

Active Publication Date: 2021-03-05
S2C
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

This method of statistical dynamic power consumption not only requires a large amount of data and calculation, but also consumes a long time, and has high requirements for the selection of the CPU, which increases the economic cost.
At the same time, the accuracy of this statistical method is not high, and the power consumption value under each clock signal cannot be accurately counted, and the peak power consumption cannot be further recorded.

Method used

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  • A method and device for accurately analyzing dynamic power consumption
  • A method and device for accurately analyzing dynamic power consumption

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Embodiment Construction

[0038] Embodiments of the present application will be described in detail below in conjunction with the accompanying drawings.

[0039] Embodiments of the present application are described below through specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the content disclosed in this specification. Apparently, the described embodiments are only some of the embodiments of this application, not all of them. The present application can also be implemented or applied through other different specific implementation modes, and various modifications or changes can be made to the details in this specification based on different viewpoints and applications without departing from the spirit of the present application. It should be noted that, in the case of no conflict, the following embodiments and features in the embodiments can be combined with each other. Based on the embodiments in this application, all...

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Abstract

The embodiment of the present application provides a method and device for accurate analysis of dynamic power consumption, belonging to the technical field of integrated circuit chip design verification, specifically including: loading the circuit design into a first hardware emulator including a programmable logic array for simulation operation , read and store the external port status data of the first emulator in real time, configure the second emulator, read all the second internal data of the emulator clock by clock, and use the accumulator to reverse the signal in the comparison result The number is accumulated and counted in real time and an interrupt signal is generated when the total number of flips is greater than a preset threshold; through the processing scheme of this application, the accurate acquisition and analysis of dynamic power consumption values ​​is realized, and the peak power consumption can be accurately recorded.

Description

technical field [0001] The present application relates to the technical field of integrated circuit chip design verification, in particular to a method and device for accurately analyzing dynamic power consumption. Background technique [0002] Power consumption in a circuit usually refers to the heat dissipated on components and devices, or the power consumption generated when logic gates flip. Power consumption analysis is an important function of integrated circuit computer aided design, referred to as ICCAD, also known as electronic design automation. For circuit design, users mainly pay attention to dynamic power consumption, referred to as Dynamic power, that is, the power consumption generated when the logic gate flips. [0003] When designing the verification model in the early stage, it can be considered that the frequency of flipping corresponds to power consumption. The method in the prior art is to count the inversion probability of each signal on each clock do...

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F30/33G06F119/06
CPCG06F30/33G06F2119/06
Inventor 林铠鹏张吉锋
Owner S2C