Semiconductor structure and forming method thereof

A technology of semiconductor and gate structure, applied in the field of semiconductor structure and its formation, can solve the problems of difficult channel and poor channel control ability of gate structure, so as to improve electrical performance, increase stress and form high quality Effect

Pending Publication Date: 2021-01-29
SEMICON MFG INT (SHANGHAI) CORP +1
View PDF0 Cites 0 Cited by
  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the ability of the gate structure to control the channel becomes worse, and the gate volta

Method used

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
View more

Image

Smart Image Click on the blue labels to locate them in the text.
Viewing Examples
Smart Image
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof
  • Semiconductor structure and forming method thereof

Examples

Experimental program
Comparison scheme
Effect test

Example Embodiment

[0028]The currently formed devices still suffer from poor performance. A method of forming a semiconductor structure is now used to analyze the reasons for the poor performance of the device.

[0029]referencefigure 1 withfigure 2 It is a schematic diagram of the structure corresponding to each step in a method for forming a semiconductor structure.

[0030]Such asfigure 1 As shown, the semiconductor structure includes: a substrate, the substrate 1 includes an isolation region I and a device region II; a gate structure 2 is located on the substrate 1, and the gate structure 2 located on the isolation region I serves as Dummy gate structure 21, the gate structure 2 located on the device region II serves as the device gate structure 22; source and drain doped regions 3, located in the substrate 1 on both sides of the gate structure 2; The interlayer dielectric layer 4 is located on the substrate, covers the sidewalls of the gate structure 2 and exposes the top of the gate structure 2.

[0031]...

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

PUM

No PUM Login to view more

Abstract

The invention discloses a semiconductor structure and a forming method thereof, and the forming method comprises the steps: providing a substrate which comprises an isolation region and a device region; forming a gate structure and an interlayer dielectric layer covering the substrate on the substrate, wherein the interlayer dielectric layer covers the side wall of the gate structure, the interlayer dielectric layer exposes the top of the gate structure, the gate structure located on the isolation region serves as a pseudo gate structure, and the gate structure located on the device region serves as a device gate structure; etching the pseudo gate structure and part of the thickness of the substrate below the pseudo gate structure to form an opening which penetrates through the interlayerdielectric layer and is located in the substrate; forming a first dielectric layer in the opening; and after the first dielectric layer is formed, forming source and drain doped regions in the substrate at two sides of the device gate structure. The source and drain doped regions are formed only after the opening is formed by etching, the source and drain doped regions are not easy to damage in the step of forming the opening, the source and drain doped regions can provide enough stress for the channel, so that the migration rate of carriers is higher, and the electrical property of the semiconductor structure is improved.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] In semiconductor manufacturing, with the development trend of ultra-large-scale integrated circuits, the feature size of integrated circuits continues to decrease. In order to adapt to smaller feature sizes, metal-oxide-semiconductor field-effect transistors (Metal-Oxide-Semiconductor Field-Effect Transistor , MOSFET) channel length has been shortened accordingly. However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the ability of the gate structure to control the channel becomes worse, and the gate voltage pinches off the channel. The channel becomes more and more difficult, making subthreshold leakage (subthreshold leakage), the so-called short-channel effect (shor...

Claims

the structure of the environmentally friendly knitted fabric provided by the present invention; figure 2 Flow chart of the yarn wrapping machine for environmentally friendly knitted fabrics and storage devices; image 3 Is the parameter map of the yarn covering machine
Login to view more

Application Information

Patent Timeline
no application Login to view more
IPC IPC(8): H01L21/8234H01L27/088
CPCH01L21/823431H01L21/823418H01L27/0886
Inventor 周飞
Owner SEMICON MFG INT (SHANGHAI) CORP
Who we serve
  • R&D Engineer
  • R&D Manager
  • IP Professional
Why Eureka
  • Industry Leading Data Capabilities
  • Powerful AI technology
  • Patent DNA Extraction
Social media
Try Eureka
PatSnap group products