Semiconductor structure and forming method thereof

Abstract

The invention discloses a semiconductor structure and a forming method thereof, and the forming method comprises the steps: providing a substrate which comprises an isolation region and a device region; forming a gate structure and an interlayer dielectric layer covering the substrate on the substrate, wherein the interlayer dielectric layer covers the side wall of the gate structure, the interlayer dielectric layer exposes the top of the gate structure, the gate structure located on the isolation region serves as a pseudo gate structure, and the gate structure located on the device region serves as a device gate structure; etching the pseudo gate structure and part of the thickness of the substrate below the pseudo gate structure to form an opening which penetrates through the interlayerdielectric layer and is located in the substrate; forming a first dielectric layer in the opening; and after the first dielectric layer is formed, forming source and drain doped regions in the substrate at two sides of the device gate structure. The source and drain doped regions are formed only after the opening is formed by etching, the source and drain doped regions are not easy to damage in the step of forming the opening, the source and drain doped regions can provide enough stress for the channel, so that the migration rate of carriers is higher, and the electrical property of the semiconductor structure is improved.

Description

technical field [0001] Embodiments of the present invention relate to the field of semiconductor manufacturing, and in particular, to a semiconductor structure and a method for forming the same. Background technique [0002] In semiconductor manufacturing, with the development trend of ultra-large-scale integrated circuits, the feature size of integrated circuits continues to decrease. In order to adapt to smaller feature sizes, metal-oxide-semiconductor field-effect transistors (Metal-Oxide-Semiconductor Field-Effect Transistor , MOSFET) channel length has been shortened accordingly. However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the ability of the gate structure to control the channel becomes worse, and the gate voltage pinches off the channel. The channel becomes more and more difficult, making subthreshold leakage (subthreshold leakage), the so-called short-channel effect (shor...

AI Technical Summary

Problems solved by technology

However, as the channel length of the device is shortened, the distance between the source and the drain of the device is also shortened, so the ability of the gate structure to control the channel becomes worse, and the gate voltage pinches off the channel. The difficulty of the channel is also increasing, making the phenomenon of subthreshold leakage (subthreshold leakage), the so-called short-channel effect (short-channel effects, SCE) more prone to occur

Images