Chip signal testing device and method based on solder ball array packaging

Abstract

The invention discloses a chip signal testing device based on solder ball array packaging. The chip signal testing device comprises an adapter base, an adapter plate, an active probe and an oscilloscope, the bottom side of the adapter base is correspondingly connected with a bonding pad of a PCB where a chip is located and is used for lifting the bonding pad of the PCB. The bottom side of the adapter plate is connected with the top side of the adapter base through a solder ball, the bonding pad is arranged on the top side of the adapter plate, the bonding pad of the adapter plate comprises a connecting end used for being connected with a chip to be tested through the solder ball and a testing end connected with the connecting end, and the testing end is connected with the oscilloscope through the active probe. The invention also discloses a testing method. The testing method comprises the following steps: S01, extracting S parameters of a measurement channel where each test end of theadapter plate is located in advance; and S02, when the signal of the chip is measured, de-embedding the measurement channel according to the S parameters of the measurement channel to obtain a de-embedded waveform. The testing device and method have the advantages of being accurate and reliable in testing and the like.

Description

technical field [0001] The invention mainly relates to the technical field of chip signal testing, in particular to a chip signal testing device and testing method based on solder ball array packaging. Background technique [0002] As the chip pins of the integrated circuit increase, its power consumption also increases, and the chip using the BGA package (ball array package) can effectively reduce the volume and increase the heat dissipation performance, and the ensuing problem is high There are problems in IC signal detection and conformance testing of dense BGA packages. Generally, testable points are reserved in the hardware design stage. However, due to signal integrity and other issues, the signal at the testable points and BGA solder balls is Due to the capacitive load characteristics at the test point, the signal waveform quality is distorted, and there may be hook or ringing. Therefore, the most realistic signal waveform data can be obtained only by testing the sol...

AI Technical Summary

Problems solved by technology

The general test fixture simply leads the high-speed signal through the test cable to facilitate detection, but does not consider the impedance matching relationship between the lead wire and the actual signal line and the error of the inductive or capacitive load due to welding problems. Further distortion of the signal will also introduce errors to interfere with the reliable operation of the system, and the test will get wrong results

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