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Method for reducing thermal crosstalk in 3D cross-point memory array

A memory and array technology, applied in the field of three-dimensional electronic memory, can solve problems such as voltage drop

Pending Publication Date: 2021-03-09
YANGTZE ADVANCED MEMORY INDUSTRIAL INNOVATION CENTER CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the wordline (WL) and bitline (Type B) in the cell encounter a large resistance, the voltage drop can be significant

Method used

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  • Method for reducing thermal crosstalk in 3D cross-point memory array
  • Method for reducing thermal crosstalk in 3D cross-point memory array
  • Method for reducing thermal crosstalk in 3D cross-point memory array

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Embodiment Construction

[0026] The present disclosure addresses challenges and problems associated with existing and current methods, systems and devices. Among other things, the use of lamination, wet etching, oxides, and changing the shape of specific layers in the geometry of a three-dimensional memory array (i.e., the current sensitive layer in a programmable current memory cell) to increase certain characteristics or properties of memory cells or reduce undesired characteristics in memory arrays. Embodiments and examples are presented herein that illustrate the principles of the disclosure. The present disclosure is not limited in any way by these embodiments and examples, which are given merely to explain the underlying principles. While specific configurations and arrangements are discussed, it should be understood that this is done for illustrative purposes only. A person skilled in the art will recognize that other configurations and arrangements can be used without departing from the spir...

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PUM

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Abstract

Systems, methods, and apparatus are described that are capable of reducing the amount of thermal crosstalk between cells in a three-dimensional array of memory cells by using a laminate that in turn allows for smaller scale manufacturing of the memory cells. In the disclosed methods, systems, and devices, sacrificial material is used to fill gaps between adjacent memory cells, and the sacrificialmaterial is later removed to form air gaps. These air gaps are very efficient for reducing thermal crosstalk between adjacent cells. It allows scaling to smaller memory cells and spacing with less effects of thermal effects from adjacent cell programming. Furthermore, the method reduces thermal crosstalk between adjacent 3D cross-point memory cells, has good mechanical support during cell manufacturing, and improves the scaling capability of the 3D cross-point memory.

Description

technical field [0001] In general terms, the present disclosure relates to three-dimensional electronic memory. More specifically, the present disclosure relates to the use of lamination, wet etching, oxides, and the formation of air pockets in the geometry of three-dimensional memory arrays to increase certain characteristics or properties of memory arrays or to reduce undesirable characteristic. Background technique [0002] Planar memory cells are scaled to smaller sizes by improving process technology, circuit design, programming algorithms, and manufacturing processes. However, as the feature size of memory cells approaches the lower limit, planar processes and fabrication techniques become challenging and expensive. Therefore, the memory density of planar memory cells approaches the upper limit. Three-dimensional (3D) memory architectures can address the density limitations of planar memory cells. [0003] A phase-change memory (PCM) cell is a non-volatile solid-st...

Claims

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Application Information

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IPC IPC(8): H01L27/24H01L45/00
CPCH10B63/30H10N70/841H10N70/881H10N70/826H10B63/24H10B63/84H10N70/231H10N70/8616
Inventor 刘峻
Owner YANGTZE ADVANCED MEMORY INDUSTRIAL INNOVATION CENTER CO LTD