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Interconnect structures

A technology for interconnecting wires and dielectric layers, applied to electrical components, electrical solid-state devices, circuits, etc., can solve problems such as inability to improve transistor performance

Inactive Publication Date: 2021-03-16
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

It has been observed that the high contact resistance exhibited by interconnects in advanced IC technology nodes can significantly delay (and in some cases prevent) signals from efficiently traveling to and from IC devices such as transistors, failing to improve advanced IC technology. Transistor performance of this IC device in technology node
Thus, while existing interconnect contacts are generally adequate for their intended purpose, they are not entirely satisfactory in all respects

Method used

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Embodiment Construction

[0043] The present disclosure relates generally to integrated circuit (IC) devices, and more particularly to interconnect structures of IC devices.

[0044] The following provides a number of different implementations or examples for implementing different components of an embodiment of the invention. Specific examples of components and configurations are described below to simplify the embodiments of the present invention. Of course, these are just examples, not intended to limit the embodiments of the present invention. For example, in the following description, it is mentioned that the first component is formed on or on the second component, which may include embodiments in which the first component and the second component are formed in direct contact, and may include the first component An embodiment in which an additional part is formed between the first part and the second part so that the first part and the second part may not be in direct contact.

[0045] In additi...

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Abstract

Interconnect structures are disclosed herein. An exemplary interconnect structure includes a first contact feature in a first dielectric layer, a second dielectric layer over the first dielectric layer, a third dielectric layer over the second dielectric layer, a second contact feature extending through the second dielectric layer and the third dielectric layer, and a graphene layer between the second contact feature and the third dielectric layer.

Description

technical field [0001] Embodiments of the present invention relate to an interconnection structure, in particular to an interconnection structure with a graphene barrier layer. Background technique [0002] The integrated circuit (IC) industry has experienced exponential growth. Technological advances in IC materials and design have produced several generations of ICs, each generation having smaller and more complex circuits than the previous generation. In the course of IC evolution, functional density (ie, the number of interconnected devices per chip area) generally increases, while geometry size (ie, the smallest element (or line) that can be produced using a process) decreases. This scaling down process generally provides benefits by increasing production efficiency and reducing associated costs. [0003] This miniaturization has also increased the complexity of ICs processing and manufacturing, and in order to realize these advances, similar developments in IC proces...

Claims

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Application Information

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IPC IPC(8): H01L23/532H01L21/768
CPCH01L23/53276H01L21/7685H01L21/76864H01L2221/1073H01L21/76843H01L21/76852H01L21/76867H01L21/76885H01L23/53209H01L23/53238H01L21/76876H01L23/5226H01L21/324
Inventor 杨士亿李明翰眭晓林
Owner TAIWAN SEMICON MFG CO LTD