Method for manufacturing semiconductor device

Abstract

The disclosure relates to a method for manufacturing a semiconductor device. A method includes forming a gate dielectric layer: forming a metal gate strip over a bottom portion of the gate dielectriclayer: and performing a first etching process on the metal gate strip to remove a portion of the metal gate strip. The first etching process is performed anisotropically. After the first etching process, a second etching process is performed on the metal gate strip to remove a residue portion of the metal gate strip. The second etching process includes an isotropic etching process. A dielectric material is filled into a recess left by the etched portion and the etched residue portion of the metal gate strip.

Description

technical field [0001] The present invention relates to methods for manufacturing semiconductor devices. Background technique [0002] Metal oxide semiconductor (MOS) devices are the basic building blocks in integrated circuits. Existing MOS devices typically have a gate electrode with polysilicon doped with p-type or n-type impurities using a doping operation such as ion implantation or thermal diffusion. The work function of the gate electrode is tuned to the band-edge of silicon. For n-type metal oxide semiconductor (NMOS) devices, the work function can be tuned to be close to the conduction band of silicon. For P-type metal oxide semiconductor (PMOS) devices, the work function can be tuned close to the valence band of silicon. The work function of the polysilicon gate electrode can be tuned by selecting appropriate impurities. [0003] MOS devices with polysilicon gate electrodes exhibit a carrier depletion effect, which is also known as polysilicon depletion effect....

AI Technical Summary

Problems solved by technology

The depletion effect produces an increase in the effective gate dielectric thickness, making it more difficult to create an inversion layer at the surface of the semiconductor

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