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Memory, and writing method and reading method of memory

A memory and bit-storage technology, applied in the field of memory, can solve the problems of large storage unit area, low integration, and inability to realize independent reading and writing.

Pending Publication Date: 2021-03-23
CETHIK GRP +1
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

[0006] The embodiment of the present application provides a memory, a writing method and a reading method of the memory, so as to at least solve the technical problems in the related art that the storage unit area of ​​the memory is large, the integration degree is low, and independent reading and writing cannot be realized

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  • Memory, and writing method and reading method of memory
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Embodiment Construction

[0043] It should be pointed out that the following detailed description is exemplary and intended to provide further explanation to the present application. Unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this application belongs.

[0044] It should be noted that the terminology used here is only for describing specific implementations, and is not intended to limit the exemplary implementations according to the present application. As used herein, unless the context clearly dictates otherwise, the singular is intended to include the plural, and it should also be understood that when the terms "comprising" and / or "comprising" are used in this specification, they mean There are features, steps, operations, means, components and / or combinations thereof.

[0045]It will be understood that when an element such as a layer, film, region, or substrate is referred to as b...

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Abstract

The invention discloses a memory, and a writing method and a reading method of the memory. The memory comprises a spin orbit moment providing layer, two storage bits, two diodes, a first bit line, a second bit line, a word line, a source line and a transistor, one end of the spin orbit moment providing layer is connected with the first bit line, the other end of the spin orbit moment providing layer is connected with the transistor, and the transistor is connected with the word line and the source line. The two storage bits are arranged on the surface of the spin orbital moment providing layerat intervals, the ends, away from the spin orbital moment providing layer, of the storage bits are connected with the first ends of the diodes in series in a one-to-one correspondence mode, the electrodes corresponding to the first ends of the diodes connected with the two storage bits are different in positive and negative, and the second ends of the diodes are connected with the second bit lines respectively. According to the invention, the technical problems of large storage unit area, low integration level and incapability of realizing independent reading and writing of the memory in therelated art are solved.

Description

technical field [0001] The present application relates to the field of memory, and in particular, to a memory, a method for writing to the memory, and a method for reading the memory. Background technique [0002] Spin-Orbit Torque Magnetic Random Access Memory (SOT-MRAM for short), and Spin-Transfer Torque Magnetic Random Access Memory (STT-MRAM for short) ) is quite different. SOT-MRAM is based on the spin Hall effect. Spin currents with different polarization directions accumulate on the opposite edges of the SOT-MRAM heavy metal layer and write into the magnetic tunnel junctions (Magnetic Tunnel Junctions, MTJ for short). SOT-MRAM has the advantages of low power consumption and high performance, and has broad market prospects in the Internet of Things, cloud computing, and aerospace. [0003] In related technologies, there are still various problems in SOT-MRAM: for example, figure 1 A schematic structural diagram of a SOT-MRAM in the related art is shown, such as fi...

Claims

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Application Information

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IPC IPC(8): G11C11/16G11C11/18
CPCG11C11/161G11C11/18G11C11/1675G11C11/1673G11C11/16
Inventor 殷标孟皓迟克群李州
Owner CETHIK GRP
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