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Process for reducing defect rate of 8-inch polished wafer edge-removing sucker marks

A technology of defect rate and polishing sheet, which is applied in the direction of electrical components, semiconductor/solid-state device manufacturing, circuits, etc., can solve the problems of the ability to block the self-doping effect, the corrosion of silicon dioxide on the surface of the product, and the impact on the appearance quality, etc., to achieve Strengthen the removal and purification effect, improve the first pass rate, and avoid the effect of rework cost

Pending Publication Date: 2021-03-26
ZHONGHUAN ADVANCED SEMICON MATERIALS CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] The purpose of the present invention is to provide a kind of technology that reduces the defect rate of the suction cup of the 8-inch polishing sheet to remove the edge, to solve the problem that the surface of the product is damaged due to the HF on the surface of the suction cup that is not cleaned in the process of edge removal at present in the above-mentioned background technology. The silicon oxide is corroded, forming a macroscopic color difference, which affects the appearance quality. At the same time, after the silicon dioxide layer is corroded, its ability to block the self-doping effect will be affected to a certain extent.

Method used

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  • Process for reducing defect rate of 8-inch polished wafer edge-removing sucker marks
  • Process for reducing defect rate of 8-inch polished wafer edge-removing sucker marks
  • Process for reducing defect rate of 8-inch polished wafer edge-removing sucker marks

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Experimental program
Comparison scheme
Effect test

Embodiment 1

[0026] The experimental technique of the present embodiment comprises the following steps:

[0027] S1. First, carry out real-time transformation of the original automatic de-edge machine pipeline, and separate the liquid outlet of the original B-line drainage pipeline, so that the B-line drainage pipeline can be directly connected with the secondary distribution pipeline. Connect, and connect the discharge pipe of line A to the confluence pipe, and connect the outlet end of the confluence pipe to the secondary distribution pipe.

[0028] S2. Then place an 8-inch Czochralski sour silicon wafer with a suitable size and thickness and add it to the suction cup of the automatic edge removal machine. The machine is turned on to supply hydrofluoric acid and deionized water, and then the 8-inch The edge silicon dioxide etching process is performed on the sour-rot silicon wafer. After the edge silicon dioxide etching process is completed, the pure water is first exported through the p...

Embodiment 2

[0040] The difference from Embodiment 1 is that:

[0041] The experimental technique of the present embodiment comprises the following steps:

[0042] S1. First, connect the outlet ends of the A-line drainage pipeline and the B-line drainage pipeline with both ends of the confluence pipeline, and connect the fluid outlet end of the confluence pipeline with the secondary distribution pipeline.

[0043] S2. Then place an 8-inch Czochralski sour silicon wafer with a suitable size and thickness and add it to the suction cup of the automatic edge removal machine. The machine is turned on to supply hydrofluoric acid and deionized water, and then the 8-inch The edge silicon dioxide etching process is performed on the sour-rot silicon wafer. After the edge silicon dioxide etching process is completed, the pure water is first exported through the pipeline of the automatic edge removal machine to rinse the impurities on the surface of the silicon wafer in real time, and then removed aft...

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Abstract

The invention discloses a process for reducing a defect rate of 8-inch polished waferedge-removing sucker marks. An environment process comprises the following steps: S1, firstly, modifying an original automatic edge-removing machine table pipeline in real time, and enabling a liquid outlet end of an original B-line liquid discharge pipeline to be independent so that the B-line liquid discharge pipeline is directly connected with a secondary distribution pipeline, an A-line liquid discharge pipeline is connected with a converging pipeline, and the liquid outlet end of the converging pipeline is connected with the secondary distribution pipeline; and S2, placing and adding a 8-inch Czochralski acid-corroded silicon wafer with a proper size and thickness to a sucker loading position of an automatic edge-removing machine table, starting the machine table to supply a hydrofluoric acid and deionized water, performing edge silicon dioxide corrosion processing on the 8-inch Czochralski acid-corroded silicon wafer through the automatic edge-removing machine, and after the edge silicon dioxide corrosion processing is completed, guiding out pure water through the automatic edge-removing machine table pipeline to wash impurities on the surface of a silicon wafer in real time, and taking down the 8-inch Czochralski acid-corroded silicon wafer after washing.

Description

technical field [0001] The invention relates to the technical field of semiconductor manufacturing, in particular to a process for reducing the defect rate of suction cup printing on an 8-inch polishing sheet. Background technique [0002] In today's stage of vigorous development of semiconductor companies, manufacturing companies must continuously improve product competitiveness. An increase in the pass rate can help companies quickly reduce production costs, avoid ineffective waste of production costs, enhance corporate competitiveness, and quickly recover investment costs. [0003] At present, during the edge removal process, the silicon dioxide on the surface of the product is corroded due to the lack of HF cleaning on the surface of the suction cup, resulting in macroscopic color differences and affecting the appearance quality. At the same time, the silicon dioxide layer itself blocks self-doping after being corroded The ability of the effect will be affected to a cert...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H01L21/683
CPCH01L21/6838
Inventor 李凯鹏江笠王晖孙晨光王彦君
Owner ZHONGHUAN ADVANCED SEMICON MATERIALS CO LTD
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