Memory error correction method, memory controller and electronic equipment

A memory controller and memory error correction technology, applied in the field of memory, can solve problems such as inability to correct and obtain correct data, inability to meet the requirements of memory reliability, and limited error correction capability.

Pending Publication Date: 2021-03-30
HYGON INFORMATION TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0004] Although the ECC error correction technology has certain error checking and error correction capabilities, the error correction capability is only applicable to the case where there is only one faulty memory particle in the memory. If there are currently two or more faulty memory particles in the memory In some cases, the correct data cannot be corrected by applying the ECC error correction process
That is, the error correction capability of the ECC error correction process is limited to the case where there is only one faulty memory particle in the memory. The error correction capability is limited and cannot meet the requirements for memory reliability in practical applications.

Method used

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  • Memory error correction method, memory controller and electronic equipment
  • Memory error correction method, memory controller and electronic equipment
  • Memory error correction method, memory controller and electronic equipment

Examples

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Embodiment 1

[0036] The embodiment of this application provides a memory error correction method, which can be found in figure 1 shown, including:

[0037] S101: Use the precise synchronization mode to uniformly read and write multiple channels of the memory.

[0038] It should be noted that the so-called precise synchronization mode is also called Lockstep lockstep mode (LockStep ChannelMode), which uses the same, redundant hardware components to process the same instruction at the same time, so that a CPU cache line (Cache -line) is distributed over several memory channels.

[0039] After using the precise synchronization mode, multiple channels of memory can be used to store data on the same CPU cache line, making it possible to share memory particles among multiple channels.

[0040] S102: Read data of each memory particle in each channel.

[0041] It should be noted that, in the embodiment of the present application, the read data should meet the minimum data requirements of the EC...

Embodiment 2

[0081] In this embodiment, a specific memory error correction process applied to a DDR5 memory is taken as an example to illustrate this application.

[0082] Use the precise synchronization mode to uniformly address the DDR5 memory, read and write the two channels (channel 0 and channel 1) uniformly, and distribute the data on the two channels.

[0083] The ECC error correction algorithm uses the RS (144, 128) algorithm, and the ECC word is 128+16bit.

[0084] Since the data bit width of DDR5 memory is 32+8bit. The 2 channels are read twice and have 128+32bit. The ECC error correction algorithm only uses 16 bits of 32 bits redundant data. In this way, 16bit redundant data is left for the two channels. Each channel has 8 bits of redundant data left. That is to say, each channel has one redundant memory particle.

[0085] In the initial state, such as Image 6 As shown, the two channels consist of D0, D1, D2, D3, D4, D5, D6, D7, C0, a total of 18 memory particles with a s...

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PUM

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Abstract

The invention provides a memory error correction method, a memory controller and electronic equipment, and the method comprises the steps: carrying out the unified reading and writing of a plurality of channels of a memory in a precise synchronization mode, wherein the memory is a memory with a redundancy ratio greater than or equal to 1: 4; and reading data of each memory particle in each channel, when wrong memory particles are found through an ECC error correction algorithm according to the read data, replacing the wrong memory particles with redundant memory particles, and performing useless processing on the wrong memory particles. In this way, redundant memory particles are adopted to replace wrong memory particles to work, and therefore normal operation of the channel can be guaranteed. Each channel is replaced by redundant memory particles, so that error correction of a plurality of wrong memory particles can be realized in the implementation process.

Description

technical field [0001] The present application relates to the technical field of memory, in particular, to a memory error correction method, memory controller and electronic equipment. Background technique [0002] In the computer field, memory is one of the important components in the computer. All programs in the computer run in the memory, and its function is to temporarily store the calculations in the CPU (Central Processing Unit / Processor, central processing unit) data, and data exchanged with external storage such as hard drives. As long as the computer is running, the CPU will transfer the data that needs to be calculated into the memory for calculation, and when the calculation is completed, the CPU will transmit the result. Therefore, the reliability of data in memory is crucial to the performance of the entire system and directly affects the operation of the entire system. [0003] For this reason, ECC (Error Correction Code, Error Correction Code) technology is...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F11/10G06F11/07
CPCG06F11/1044G06F11/0793G06F11/073
Inventor 周鹏
Owner HYGON INFORMATION TECH CO LTD
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