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Stress testing method and device for simulating boards and applications occupying CPU resources

A technology for CPU resource and stress testing, applied in resource allocation, multi-programming device, software testing/debugging, etc., can solve the problems of inability to realize full pressure operation of boards, time-consuming and labor-intensive, saving testing time and manual testing work Quantity, wide application prospect, reliable effect of design principle

Active Publication Date: 2022-08-05
INSPUR SUZHOU INTELLIGENT TECH CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

[0005] In view of the above-mentioned existing two board test methods in the prior art, which cannot realize the full pressure operation of the tested board, or need to be matched with other hardware, step-by-step control, time-consuming and labor-intensive defects, the present invention provides a simulated board and Applying a stress testing method and device that occupy full CPU resources to solve the above technical problems

Method used

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  • Stress testing method and device for simulating boards and applications occupying CPU resources
  • Stress testing method and device for simulating boards and applications occupying CPU resources
  • Stress testing method and device for simulating boards and applications occupying CPU resources

Examples

Experimental program
Comparison scheme
Effect test

Embodiment 1

[0068] like figure 1 As shown, the present invention provides a stress test method for simulating a board card and an application to occupy CPU resources, including the following steps:

[0069] S1. Build a test environment and install the board to be tested in the server;

[0070] S2. Start the test, set the board to be tested to run at full pressure, and obtain the CPU logic cores and remaining logic cores occupied by the board to be tested when running at full pressure;

[0071] S3. Pressurize the remaining logic cores until the remaining logic cores run under full pressure, so that the simulation board and application can occupy the CPU resources;

[0072] S4. Record the actual operating power consumption and heat dissipation of the CPU and the board to be tested, and output them.

Embodiment 2

[0074] like figure 2 As shown, the present invention provides a stress test method for simulating a board card and an application to occupy CPU resources, including the following steps:

[0075] S1. Build a test environment and install the board to be tested in the server; the specific steps are as follows:

[0076] S11. Build a test environment;

[0077] S12. Set the server memory and CPU full configuration;

[0078] S13. Install the operating system;

[0079] S14. Install the board to be tested;

[0080] S2. Start the test, set the board to be tested to run at full pressure, and obtain the CPU logic cores and remaining logic cores occupied by the board to be tested when running at full pressure; the specific steps are as follows:

[0081] S21. Start the test;

[0082] S22. Obtain the type of the board to be tested, and select a test tool according to the type of the board to be tested to perform a full stress test on the board to be tested; for example, when the board ...

Embodiment 3

[0098] like image 3 As shown, the present invention provides a stress testing device in which an analog board and an application occupy full CPU resources, including:

[0099] The test environment building module 1 is used to build the test environment and install the board to be tested in the server; the test environment building module 1 includes:

[0100] The test environment building unit 1.1 is used to build the test environment;

[0101] Memory and CPU configuration unit 1.2, used to set the server memory and CPU full configuration;

[0102] The operating system installation unit 1.3 is used to install the operating system;

[0103] The board under test installation unit 1.4 is used to install the board under test;

[0104] The board under test is full of pressure test module 2, which is used to start the test, set the board under test to run under full pressure, and obtain the CPU logic cores and remaining logic cores occupied by the board under test when the board ...

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Abstract

The invention provides a stress testing method and device for simulating a board and an application to occupy full CPU resources. The method includes the steps of: building a test environment, installing a board to be tested in a server; starting the test, and setting the board to be tested to run under full pressure , and obtain the CPU logic cores and remaining logic cores occupied by the board to be tested when running at full pressure; pressurize the remaining logic cores until the remaining logic cores run at full pressure, so that the simulated board and applications occupy full CPU resources; record the CPU and The actual operating power consumption and heat dissipation of the board to be tested are output. The invention monitors the occupancy of the CPU logic cores running at full load of the board to be tested, pressurizes the remaining logic cores until the board to be tested and the CPU can run at full load, simulates the actual application scenario of the server, and is the board to be tested. The card power consumption and CPU heat dissipation test provide data basis, which can not only ensure the full-load operation of the board under test, but also greatly save the test time and manual test workload.

Description

technical field [0001] The invention belongs to the technical field of server board card testing, and in particular relates to a stress testing method and device in which an analog board card and an application occupy CPU resources. Background technique [0002] As the demand for servers with different boards continues to increase, taking the next-generation Whitely platform as an example, a dual-socket server will be filled with many board devices. On the current Purly platform, servers can be equipped with GPUs, NPUs, graphics cards and other devices as required. In the field of server testing, when a certain board device is plugged into the server, the device will only occupy a part of the CPU resources. According to the test requirements, it is necessary to ensure that the remaining CPU utilization is fully loaded when the board device is fully stressed and tested. The so-called In practical application scenarios, full load is achieved through the operation of some appl...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F11/36G06F9/50
CPCY02D10/00
Inventor 陈佳旭
Owner INSPUR SUZHOU INTELLIGENT TECH CO LTD