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Semiconductor devices and their manufacturing methods

A technology of semiconductors and conductors, applied in the field of integrated horizontal full-wound gate nanostructures, which can solve the problem of reducing the minimum structure size

Pending Publication Date: 2021-05-04
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as the minimum structure size decreases, additional problems arise to be solved

Method used

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  • Semiconductor devices and their manufacturing methods
  • Semiconductor devices and their manufacturing methods
  • Semiconductor devices and their manufacturing methods

Examples

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Embodiment Construction

[0088] Different embodiments or examples provided below may implement different structures of the present disclosure. The examples of specific components and configurations are used to simplify the present disclosure and not to limit the present disclosure. For example, a description of forming a first component on a second component includes an embodiment in which the two are in direct contact, or an embodiment in which the two are interposed by other additional components rather than in direct contact. In addition, multiple examples of the present disclosure may repeatedly use the same reference numerals for brevity, but elements with the same reference numerals in various embodiments and / or configurations do not necessarily have the same corresponding relationship.

[0089] In addition, spatially relative terms such as "below", "beneath", "lower", "above", "above", or similar terms may be used to simplify the relationship between one element and another element in the drawi...

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PUM

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Abstract

Semiconductor devices and their manufacturing methods are disclosed herein, and more particularly to semiconductor devices including a transistor having gate all around (GAA) transistor structures and manufacturing methods thereof. The methods described herein allow for complex shapes (e.g., "L-shaped") to be etched into a multi-layered stack to form fins used in the formation of active regions of the GAA nanostructure transistor structures. In some embodiments, the active regions may be formed with a first channel width and a first source / drain region having a first width and a second channel width and a second source / drain region having a second width that is less than the first width.

Description

technical field [0001] Embodiments of the present disclosure relate to the integration of horizontal all-around gate nanostructures for the design and operation of integrated circuits at the 3nm technology node or smaller. Background technique [0002] Semiconductor devices have been used in various electronic applications, such as personal computers, cell phones, digital cameras, and other electronic equipment. The manufacturing method of semiconductor devices usually deposits insulating or dielectric layers, conductive layers, and semiconductor layers on a semiconductor substrate in sequence, and uses lithography to pattern the various material layers to form circuit components and units on the semiconductor substrate. [0003] The semiconductor industry continues to reduce the minimum structure size to improve the density of various electronic components (such as transistors, diodes, resistors, capacitors, or the like) to integrate more components into a given area. Howe...

Claims

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Application Information

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IPC IPC(8): H01L29/78H01L29/06H01L29/10H01L29/423H01L21/336
CPCH01L29/785H01L29/0665H01L29/1033H01L29/42356H01L29/66795H01L29/78696H01L29/42392H01L29/66439B82Y10/00H01L29/775H01L29/0653H01L29/0676H01L29/41791H01L2029/7858H01L21/823431
Inventor 朱熙甯陈冠霖江国诚王志豪
Owner TAIWAN SEMICON MFG CO LTD