Semiconductor structure and manufacturing method thereof

Abstract

The invention provides a semiconductor structure and a manufacturing method thereof. The structure comprises a substrate, a first capacitor layer, a second bit line layer, a word line layer, a first bit line layer, a second capacitor layer, first silicon columns and second silicon columns, wherein the first capacitor layer is located on the substrate and includes a plurality of first capacitors; the second bit line layer is positioned above the first capacitor layer and includes a plurality of second bit lines which are arranged in parallel; the word line layer is positioned above the second bit line layer and includes a plurality of word lines which are arranged in parallel; the first bit line layer is positioned above the word line layer and includes a plurality of first bit lines which are arranged in parallel; the second capacitor layer is positioned above the first bit line layer and includes a plurality of second capacitors; the first silicon columns and the second silicon columns are perpendicular to the second bit line layer, the word line layer and the first bit line layer; a first doped region of each first silicon column is electrically connected with a first capacitor, and a second doped region is electrically connected with a first bit line; the first doped region of each second silicon column is electrically connected with a second capacitor, and the second doped region is electrically connected with a second bit line; and the word lines wrap the middle parts of the first silicon columns and / or the second silicon columns. The semiconductor structure has relatively high element density.

Description

technical field [0001] The present disclosure relates to the technical field of semiconductor manufacturing, and in particular, to a semiconductor structure with higher element density and a manufacturing method thereof. Background technique [0002] With the increase of storage requirements, increasing the arrangement density of storage components in the manufacturing process of storage components has become a major issue in this field. [0003] In related art, there is a 4F that builds vertical transistors 2 Technology that vertically arranges transistors on a substrate to increase the number of transistors per unit area. However, with the improvement of storage density, the demand for further upgrading, 4F 2 Technology has reached its density limit, and continuing to shorten the pitch between transistors will create serious crosstalk problems that greatly affect the performance of storage elements. Therefore, there is an urgent need in the industry for a semiconductor ...

AI Technical Summary

Problems solved by technology

However, with the improvement of storage density, the demand for further upgrading, 4F 2 Technology has reached its density limit, and continuing to shorten the spacing between transistors will create serious crosstalk problems that greatly affect the performance of memory elements

Images