Semiconductor structure manufacturing method and semiconductor structure

Abstract

An embodiment of the invention belongs to the technical field of semiconductor manufacturing, relates to a semiconductor structure manufacturing method and a semiconductor structure, and is used for solving the problems that in the process of etching a dielectric layer, a rough top surface easily causes ion scattering, the size precision of a formed capacitor hole is poor, and the performance of the capacitor structure is influenced. The semiconductor structure manufacturing method comprises the steps of: forming a film layer structure on a substrate, forming a pattern transfer layer on the film layer structure, defining a plurality of holes in the pattern transfer layer, and performing planarization processing on the pattern transfer layer; and etching the film layer structure through the hole so as to form a capacitor hole in the film layer structure. Before the capacitor hole is formed, the top surface of the pattern transfer layer is planarized, and in the etching process, the flat top surface of the pattern transfer layer can avoid ion scattering, so that bumps on the side wall of the formed capacitor hole or inclination of the capacitor hole are avoided, the size precision of the capacitor hole is improved, and the performance of the capacitor structure is improved.

Description

technical field [0001] Embodiments of the present invention relate to the technical field of semiconductor manufacturing, and in particular, to a method for manufacturing a semiconductor structure and a semiconductor structure. Background technique [0002] With the gradual development of storage device technology, Dynamic Random Access Memory (DRAM for short) is gradually applied in various electronic devices due to its higher density and faster read / write speed. The DRAM includes a capacitor structure and a transistor structure, the capacitor structure is connected to the transistor structure, and the data stored in the capacitor structure can be read through the transistor structure. [0003] In the related art, the capacitor structure includes a substrate and a dielectric layer disposed on the substrate, capacitor holes are arranged on the dielectric layer, and capacitor tubes are arranged in the capacitor holes. During manufacture, a dielectric layer is first formed on...

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Problems solved by technology

[0005] In view of this, an embodiment of the present invention provides a semiconductor structure manufacturing method and a semiconductor structure to solve the problem that in the process of etching the dielectric layer, the rough top surface is likely to cause ion scattering, so that the formed capacitance hole has poor dimensional accuracy and affects the capacitance structure. performance technical issues

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