Static random access memory cell

Abstract

A static random access memory (SRAM) cell of the present disclosure includes a first pull-down device, a second pull-down device, a first transfer gate device, and a second transfer gate device disposed in a first p-well on a substrate; a third pull-down device, a fourth pull-down device, a third transmission gate device and a fourth transmission gate device which are arranged in a second p well on the substrate; a first pull-up device and a second pull-up device which are disposed in an n-well disposed between the first p-well and the second p-well; and a first landing pad between the second pull-down device and the first pull-up device. The first landing pad is electrically coupled to the gate structure of the second transfer gate device via a path of the first gate via.

Description

technical field [0001] The present disclosure relates to a static random access memory (SRAM) cell, and more particularly to a SRAM cell having orthogonal metal lines. Background technique [0002] The semiconductor industry has experienced rapid growth. Advances in technology in semiconductor materials and design have produced several generations of semiconductor devices, each generation having smaller and more complex circuits than the previous generation. During the development of integrated circuits (ICs), functional density (eg, the number of interconnected devices per unit chip area) typically increases, while geometric dimensions (eg, the The smallest component (or line) will shrink. This scaling process typically provides benefits by increasing production efficiency and reducing associated costs. However, these advances do increase the complexity of the process and manufacture of semiconductor devices. [0003] In deep sub-micron integrated circuit technology, em...

AI Technical Summary

Problems solved by technology

Dual-terminal SRAM cells may have complex metal routing, which may pose challenges for routing setup and lithography process window

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