Array substrate, preparation method thereof and display device
An array substrate and a substrate technology are applied in the fields of array substrates and their preparation methods and display devices, which can solve the problems of reducing the market competitiveness of display screens and increasing the power consumption of backlights, and achieve the effects of avoiding crosstalk or flicker and improving transmittance.
- Summary
- Abstract
- Description
- Claims
- Application Information
AI Technical Summary
Problems solved by technology
Method used
Image
Examples
Embodiment 1
[0060] The structure of the thin film transistor is described as an example in which the gate is arranged on the substrate.
[0061] Provide substrate
[0062] In this step, a substrate is provided. Materials forming the substrate include, but are not limited to, glass.
[0063] form gate
[0064] In this step, a gate electrode is formed. Specifically, refer to Figure 4 , deposit and pattern the gate 210 material on one side of the substrate 100 . The material forming the gate 210 includes but not limited to polysilicon, Mo, Al, Cu or their corresponding alloy materials and stack combinations.
[0065] form gate insulating layer
[0066] In this step, a gate insulating layer is formed. Specifically, refer to Figure 5 A gate insulating layer 220 is formed on a side of the gate 210 away from the substrate 100 . Further, the process method adopted includes but not limited to sputtering (Sputter), chemical vapor deposition (Chemical Vapor Deposition), atomic layer depos...
Embodiment 2
[0086] The structure of the thin film transistor is described as an example in which the gate is arranged on the substrate.
[0087] Referring to the method of Embodiment 1, the difference is that the organic film layer 300 does not extend to the display area A, and the gate insulating layer 220 and the first passivation layer 250 extend to the display area A.
[0088] In Embodiment 2, only the organic film layer 300 located in the display area A is etched away, and the gate insulating layer 220 and the first passivation layer 250 located in the display area A are retained.
[0089] The schematic diagram of the array substrate prepared in Example 2 is as follows Figure 13 shown. In this embodiment, by removing the organic film layer located in the display area, the transmittance of the display area of the array substrate can be effectively improved.
[0090] Perform light effect simulation on the array substrate obtained in Example 2, the simulated structure is as follows...
Embodiment 3
[0093] The structure of the array substrate in this embodiment and figure 1 The structure shown is the same.
[0094] The difference from the existing array substrate is that the process parameters of the film layer are changed.
[0095] In this implementation, the material for forming the gate insulating layer 220 and / or the first passivation layer 250 is SiN, and the formation method is PECVD (Plasma Enhanced Chemical Vapor Deposition). Using NH 3 and SiH 4 As the main reaction gas, the influence of the generated SiN film layer on the transmittance will be mainly reflected in the refractive index N and extinction coefficient K of the film layer. The refractive index N affects the total reflection ratio when the light near the interface is transmitted to this layer. When the refractive index has a large difference compared with the adjacent layer, the transmittance will decrease accordingly. The extinction coefficient K reflects the absorption of light by the material its...
PUM
| Property | Measurement | Unit |
|---|---|---|
| thickness | aaaaa | aaaaa |
| thickness | aaaaa | aaaaa |
| refractive index | aaaaa | aaaaa |
Abstract
Description
Claims
Application Information
Login to View More