Configuration circuit for local dynamic reconstruction of password logic array
A dynamic reconstruction, cryptographic logic technology, applied in static memory, information storage, digital memory information and other directions, can solve the problems affecting computing performance, affecting reconstruction function, large amount of configuration information data, etc., to reduce waste, improve circuit performance effect
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[0037] The following will clearly and completely describe the technical solutions in the embodiments of the present invention with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only some, not all, embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.
[0038] In terms of configuration circuit design of cryptographic logic arrays, relevant research has been carried out mainly around the structure of reconfigurable cryptographic processors, and there are relatively few references on configuration circuits, and there are not many typical research results.
[0039] For reconfigurable computing processors, such as Figure 1a-Figure 1c As shown, the design of the configuration circuit mainly includes three typical...
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