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Method for manufacturing semiconductor device and etching solution

A manufacturing method, semiconductor technology, applied in the direction of semiconductor/solid-state device manufacturing, semiconductor devices, chemical instruments and methods, etc., can solve the problem of shrinking the minimum structure size, etc.

Pending Publication Date: 2021-07-20
TAIWAN SEMICON MFG CO LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, as the minimum structure size shrinks, there will be additional problems to be solved

Method used

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  • Method for manufacturing semiconductor device and etching solution
  • Method for manufacturing semiconductor device and etching solution
  • Method for manufacturing semiconductor device and etching solution

Examples

Experimental program
Comparison scheme
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Embodiment Construction

[0040] The following detailed description can be accompanied by accompanying drawings to facilitate understanding of various aspects of the present invention. It is worth noting that various structures are used for illustration purposes only and are not drawn to scale, as is the norm in the industry. In fact, the dimensions of the various structures may be arbitrarily increased or decreased for clarity of illustration.

[0041] Different embodiments or examples provided in the following content can implement different structures of the embodiments of the present invention. The examples of specific components and arrangements are used to simplify the disclosure and not to limit the invention. For example, the statement that the first component is formed on the second component includes that the two are in direct contact, or that there are other additional components between the two instead of direct contact. In addition, various examples of the present invention may repeatedl...

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PUM

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Abstract

The invention relates to a method for manufacturing a semiconductor device and an etching solution. In a wet etching process to pattern a metal layer such as a p-metal work function layer over a dielectric layer such as a high-k gate dielectric layer, a selectivity of the wet etching solution between the metal layer and the dielectric layer is increased utilizing an inhibitor. The inhibitor includes such inhibitors as a phosphoric acid, a carboxylic acid, an amino acid, or a hydroxyl group.

Description

technical field [0001] Embodiments of the present invention relate to a method for manufacturing a semiconductor device, and more particularly relate to the composition of an etching solution used. Background technique [0002] Semiconductor devices are used in a variety of electronic applications, such as personal computers, cell phones, digital cameras, and other electronic equipment. The manufacturing method of semiconductor devices is usually to sequentially deposit insulating or dielectric layer, conductive layer, and semiconductor layer materials on the semiconductor substrate, and then use lithography to pattern the various material layers to form circuit components and units on the semiconductor substrate. [0003] The semiconductor industry continues to reduce the minimum structure size to continuously improve the integration density of various electronic components (such as transistors, diodes, resistors, capacitors, or the like), which can integrate more component...

Claims

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Application Information

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IPC IPC(8): H01L21/8234C09K13/00C09K13/04C09K13/06
CPCH01L21/823431H01L21/823437C09K13/00C09K13/04C09K13/06H01L21/32134H01L29/66545H01L29/517H01L29/4966H01L21/823821H01L21/823842H01L27/0924H01L21/823814H01L21/823807H01L21/76224H01L21/28088C23F1/10H01L21/02181H01L21/823462H01L21/0276H01L29/66795H01L21/28079H01L21/28097H01L21/823481H01L29/6656H01L21/32139
Inventor 连建洲林群能陈玠玮江子昂叶明熙
Owner TAIWAN SEMICON MFG CO LTD
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