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Dead time control circuit suitable for GaN half-bridge gate driving system

A dead-time control, gate drive technology, applied in electrical components, high-efficiency power electronic conversion, output power conversion devices, etc., can solve the problems of different dead time, large difference in drive chain delay matching, high power loss, etc.

Active Publication Date: 2021-08-10
UNIV OF ELECTRONIC SCI & TECH OF CHINA
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

If the system adopts fixed dead time control, that is, the delay difference between the input HI and LI is fixed at the preset time, when the preset time is too small, the delay between the upper and lower drive chains may eventually cause HO and LO turns high at the same time, and the high and low side power tubes are broken down and damaged; when the preset time is too long, because the GaN power tube has no body diode, the low side power tube is reversely turned on in the dead zone to freewheel the inductor, and the voltage of the switching node HS It can be as low as -3V, considering the influence of parasitic parameters such as package inductance, the AC negative voltage of the switch node can even be as low as -5V, resulting in a huge power loss
At the same time, the fixed dead time cannot be adjusted according to different application environments, such as different Vin voltages, the delay matching of the high and low sides of the drive chain is quite different, and the time for the switch node to be charged and discharged is also different, so the system needs different dead time, causing unnecessary losses

Method used

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  • Dead time control circuit suitable for GaN half-bridge gate driving system
  • Dead time control circuit suitable for GaN half-bridge gate driving system
  • Dead time control circuit suitable for GaN half-bridge gate driving system

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Embodiment Construction

[0048] Below in conjunction with accompanying drawing, describe technical scheme of the present invention in detail:

[0049] Dead zone circuit control system of the present invention such as figure 2 As shown, the dead-zone mode selection control voltage generation circuit generates different V according to different external programming resistors DT Voltage, compared with different ref voltages in the sub-dead time generation circuit to select different delay chain outputs, and its delay is coupled with the input HI and LI signals, and finally outputs HI_OUT and LI_OUT containing dead zone information Signal.

[0050] The specific implementation and principle of the dead zone mode selection control voltage generation circuit are as follows:

[0051] The dead zone mode selection control voltage generating circuit of the present invention is composed of MP1, MP2, MP3, MP4, MP5, MP6, MP7, MP8, PNP1, PNP2, R1, R2, R3, R4, R5, R6, R7, MN1, MN2, MN3 , MN4, MN5, MN6, MN7, MN8, ...

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Abstract

The invention belongs to the technical field of power management, and particularly relates to a dead time control circuit suitable for a GaN half-bridge gate driving system. According to the scheme, different VDT voltages are generated by the dead-zone mode selection control voltage generation circuit according to different external programming resistors and are compared with different ref voltages in the segmented dead-zone time generation circuit, different delay chains are selected to be output, and the delay is coupled with input HI and LI signals, and finally HI_OUT and LI_OUT signals containing dead zone information are output. According to the circuit, the dead time of an internal half-bridge system can be adaptively adjusted by adjusting the size of an external programming resistor.

Description

technical field [0001] The invention belongs to the technical field of power management, and in particular relates to a dead-time control circuit suitable for a GaN half-bridge gate drive system. Background technique [0002] With the demand for high power density of voltage conversion in the field of power management, GaN devices rely on their lower Q g The value gradually replaces Si devices and is widely used in the half-bridge gate drive circuit to reduce the power loss of the system by 2%-4%. A half-bridge gate drive circuit using GaN devices as power transistors such as figure 1 shown. If the system adopts fixed dead time control, that is, the delay difference between the input HI and LI is fixed at the preset time, when the preset time is too small, the delay between the upper and lower drive chains may eventually cause HO and LO turns high at the same time, and the high and low side power tubes are broken down and damaged; when the preset time is too long, because...

Claims

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Application Information

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IPC IPC(8): H02M1/088H02M1/32
CPCH02M1/088H02M1/32Y02B70/10
Inventor 王卓刘媛媛张永瑜叶自凯明鑫张波
Owner UNIV OF ELECTRONIC SCI & TECH OF CHINA
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